User's Manual

BlueMod+SR/AI
BlueMod+SR/AP
Hardware Reference
Release r04d01 www.stollmann.de Page 14 of 65
The following table shows the pin states of BlueMod+SR during reset active.
Pin Name State: BlueMod+SR
EXT-RES# I/O with pull-up
(1)
and 100n to GND – use open drain
SLCK Input with weak pull-down
(2)
UART-TXD Input floating
UART-RXD Input floating
UART-RTS# Input with pull-up resistor 470kΩ
(4)
UART-CTS# Input floating
IUR-OUT# Input with pull-up resistor 470kΩ
(4)
IUR-IN# Input floating
GPIO[0:4, 6:7] Input floating
GPIO[5] Input with pull-up
(1)
GPIO[8] Output (JTDO)
BT-ACT Input with weak pull-up
(2)
BT-STAT Input with weak pull-up
(2)
WLAN-DNY Input with weak pull-up
(2)
BT-PER Input with weak pull-up
(2)
TESTMODE# Input floating
BOOT0 Input with pull-down resistor 100kΩ
(4)
SWDIO Input with pull-up
(1)
SWCLK Input with pull-down
(1)
(1)
pull-up, pull-down: R
PU,
R
PD
is typ. 40kΩ (30kΩ to 50kΩ)
(2)
weak pull-up, pull-down: See Table 12: DC characteristics, digital IO (CSR8811 related)
(3)
strong pull-up, pull-down: See Table 12: DC characteristics, digital IO (CSR8811 related)
(4)
a discrete resistor is used
Table 2: Pin States during Reset
The pin states as indicated in Table 2 are kept until hardware initialization has started.
3.4 Supply Voltage Monitor
Supply-under-voltage detection is implemented using the STM32 embedded supply voltage
monitor PVD. When VSUP falls below a threshold V
PVD
(programmed to 2,38V ± 0,1V), a system
reset will be asserted.