User's Guide
xE922-3GR Hardware User Guide
1VV0301272 Rev.0.8 2017-01-05
Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights
Reserved. Page 78 of 112
13. General purpose I/O
The following table gives an overview of the xE922-3GR pins that are ‘suggested’ for general purpose I/O use
case:
PAD
Signal
I/O
descriptions Type
Reset
state
AV8
GPIO0_EINT5
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
AT8
GPIO1_EINT2
I/O
GPIO / External IRQ, Used for SoC USB ID
WU from Sleep
CMOS 1.8V
T/PD
AS11
GPIO5_EINT7
I/O
GPIO / USB_FAULT IRQ
CMOS 1.8V
T/PD
G10
GPIO44
I/O
GPIO
CMOS 1.8V
T/PD
E10
GPIO45
I/O
GPIO
CMOS 1.8V
T/PD
A10
GPIO46
I/O
GPIO
CMOS 1.8V
T/PD
H9
GPIO47
I/O
GPIO
CMOS 1.8V
T/PD
F9
GPIO48
I/O
GPIO
CMOS 1.8V
T/PD
B9
GPIO49
I/O
GPIO
CMOS 1.8V
T/PD
G8
GPIO50
I/O
GPIO
CMOS 1.8V
T/PD
E8
GPIO51
I/O
GPIO
CMOS 1.8V
T/PD
A8
GPIO52_EINT15
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
H17
GPIO53
I/O
GPIO / MIPI Trace Clock
CMOS 1.8V
T/PD
K5
GPIO54_EINT1
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
G14
GPIO55_EINT15
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
H7
GPIO56
I/O
GPIO
CMOS 1.8V
T/PD
B11
GPIO57_EINT9
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
D11
GPIO58_EINT2
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
E6
GPIO63_EINT8
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
A6
GPIO64_EINT13
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
H5
GPIO65
I/O
GPIO
CMOS 1.8V
T/PD
F5
GPIO66_EINT15
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
B5
GPIO67_EINT0
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
F3
GPIO72_EINT9
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
B3
GPIO73_EINT10
I/O
GPIO / External IRQ
CMOS 1.8V
T/PD
As indicated in the table some of these GPIO’s can be configured for external interrupt /wake up (edge, level
detect). The optional GPIO’s defined for camera or display control, in case not applied, can also be applied for
general use case.