User's Manual

UL865-N3G Hardware User Guide
1VV0301177 Rev 2– 2015-04-20
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Reserved. Page 41 of 70
Mod. 0805 2011-07 Rev.2
9. USB Port
The UL865-N3G V2 includes one integrated universal serial bus (USB) transceiver.
9.1. USB 2.0 HS
This port is compliant with the USB 2.0 HS only.
The following table is listing the available signals:
PAD Signal I/O Function Type NOTE
18
USB_D+ I/O USB differential Data (+) 3.3V
17
USB_D- I/O USB differential Data (-) 3.3V
6
VUSB AI
Power sense for the internal USB
transceiver.
5V
Accepted range:
4.4V to 5.25V
The USB_DPLUS and USB_DMINUS signals have a clock rate of 480 MHz.
The signal traces should be routed carefully. Trace lengths, number of vias and capacitive
loading should be minimized. The characteristic impedance value should be as close as
possible to 90 Ohms differential.
In case there is a need to add an ESD protection the suggested connection is the following:
NOTE:
VUSB pin should be disconnected before activating the Power Saving Mode.
The USB FS mode could be used to provide AT Commands / Data communication but not
for a SW upgrade.
The USB FS mode is supported only when the module is fully operative.