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UL865-N3G V2 Hardware User

Guide

1VV0301177 Rev 2– 2015-04-20

Summary of content (70 pages)

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UL865-N3G V2 Hardware User Guide 1VV0301177 Rev 2– 2015-04-20
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 APPLICABILITY TABLE PRODUCT UL865-N3G V2 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 2 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE Notice While reasonable efforts have been made to assure the accuracy of this document, Telit assumes no liability resulting from any inaccuracies or omissions in this document, or from use of the information obtained herein. The information in this document has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies or omissions.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 Usage and Disclosure Restrictions License Agreements The software described in this document is the property of Telit and its licensors. It is furnished by express license agreement only and may be used only in accordance with the terms of such an agreement. Copyrighted Materials Software and documentation are copyrighted materials. Making unauthorized copies is prohibited by law.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 Contents 1. Introduction ................................................. 8 1.1. Scope ..................................................... 8 1.2. Audience .................................................. 8 1.3. Contact Information, Support .............................. 8 1.4. Document Organization ..................................... 9 1.5. Text Conventions ......................................... 10 1.6. Related Documents ....
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 7.7. Antenna Requirements ..................................... 33 7.7.1. 7.8. UL865-N3G V2 Antenna – PCB line Guidelines ................. 34 PCB Guidelines in case of FCC certification .............. 35 7.8.1. 7.8.2. 7.9. 8. Antenna - Installation Guidelines ........................ 38 Logic level specifications .................................. 39 8.5. 9. Transmission line design ...................................
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 14.2.1. 14.2.2. 14.3. Description .............................................. 56 Using ADC Converter ...................................... 56 VAUX Power Output ...................................... 57 15. Mounting the UL865-N3G V2 on your Board ..................... 58 15.1. General ................................................ 58 15.2. Module finishing & dimensions .......................... 58 15.3.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 1. Introduction 1.1. Scope The aim of this document is the description of some hardware solutions useful for developing a product with the Telit UL865-N3G V2 module. 1.2. Audience This document is intended for Telit customers, who are integrators, about to implement their applications using our UL865-N3G V2 modules. 1.3.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 1.4. Document Organization This document contains the following chapters: Chapter 1: “Introduction” provides a scope for this document, target audience, contact and support information, and text conventions. Chapter 2: “Overview” provides an overview of the document. Chapter 3: “UL865-N3G V2 Mechanical Dimensions” Chapter 4: “UL865-N3G V2 Module Connections” deals with the pin out configuration and layout.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 1.5. Text Conventions Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur. Caution or Warning – Alerts the user to important points about integrating the module, if these points are not followed, the module and end user equipment may fail or malfunction. Tip or Information – Provides advice and suggestions that may be useful when integrating the module. All dates are in ISO 8601 format, i.e.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 1.7. Document History Revision Rev 0 Rev.1 Rev.2 Date 2014-10-13 2015-04-01 2015-04-20 Changes Preliminary Version Added par. 17/18 Updated chapter 12 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 11 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 2. Overview The aim of this document is the description of some hardware solutions useful for developing a product with the Telit UL865-N3G V2 module. In this document all the basic functions of a mobile phone will be taken into account; for each one of them a proper hardware solution will be suggested and eventually the wrong solutions and common errors to be avoided will be evidenced.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 3. UL865-N3G V2 Mechanical Dimensions The UL865-N3G V2 overall dimensions are: Length: Width: Thickness: Weight 24.4 mm 24.4 mm 2.6 mm 4g Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 13 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 4. UL865-N3G V2 module connections 4.1. PIN-OUT Pad Signal I/O Function Note Type 18 USB_D+ I/O USB differential Data (+) 17 USB_D- I/O USB differential Data (-) 16 USB_VBUS AI Power sense for the internal USB transceiver.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 Pad Signal I/O Function 34 Antenna I/O Antenna pad – 50 Ω 42 GPIO_01 / DVI_WA0 I/O 41 GPIO_02 / JDR / DVI_RX I/O 40 GPIO_03 / DVI_TX I/O 39 GPIO_04 / DVI_CLK I/O 29 GPIO_05 I/O 28 GPIO_06 / SPI_SRDY I/O 27 GPIO_07 / SPI_MRDY I/O 26 GPIO_08 / STAT_LED I/O 25 SPI_CLK I/O GPIO GPIO01 Configurable GPIO / Digital Audio Interface (WA0) GPIO02 I/O pin / Jammer Detect Report / Digital Audio Interface (RX) GPIO03 GPIO I/O p
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 NOTE: If not used, almost all pins should be left disconnected. The only exceptions are the following pins: 4.2.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 4.3. Pin Layout TOP VIEW NOTE: The pins defined as NC/RFU shall be considered RESERVED and must not be connected to any pin in the application. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 17 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 5. Hardware Commands 5.1. Auto-Turning ON the UL865-N3G V2 The UL865-N3G V2 will automatically power on itself when VBATT & VBATT_PA are applied to the module. V_AUX / PWRMON pin will be at the high logic level and the module can be considered fully operating after 5 seconds. The following flow chart shows the proper turn on procedure: Modem ON Proc. PWR supply ON and >3.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 NOTE: The power supply must be applied either at the same time on pins VBATT and VBATT_PA. NOTE: To guarantee a correct module’s start-up please check that the Power Supply is with a level >3.22V within 21mS. NOTE: In order to prevent a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UL865-N3G V2 when the module is powered OFF or during an ON/OFF transition.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 A flow chart showing the AT commands managing procedure is displayed below: Start AT CMD. Delay 300mS Enter AT Y AT answer in 1second? AT init sequence. N Disconnect PWR supply Modem ON Proc. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 20 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 5.2. Turning OFF the UL865-N3G V2 The following flow chart shows the proper turnoff procedure: Modem OFF Proc. AT#SYSHALT 10s timeout Disconnect PWR supply Delay 1.5s Modem ON Proc. NOTE: In order to prevent a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UL865-N3G V2 when the module is powered off or during an ON/OFF transition.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 5.3. Resetting the UL865-N3G V2 5.3.1. Hardware Unconditional restart To unconditionally reboot the UL865-N3G V2, the pad RESET* must be tied low for at least 200 milliseconds and then released. The maximum current that can be drained from the ON* pad is 0,15 mA. WARNING: The hardware unconditional Restart must not be used during normal operation of the device since it does not detach the device from the network.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 A simple circuit to do it is: Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 23 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 In the following flow chart is detailed the proper restart procedure: Modem Reset Proc. Reset = LOW Delay 200ms Reset = HIGH Delay 1s Start AT CMD. NOTE: In order to prevent a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UL865-N3G V2 when the module is powered OFF or during an ON/OFF transition.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 6. Power Supply The power supply circuitry and board layout are a very important part in the full product design and they strongly reflect on the product overall performance, hence read the requirements carefully and the guidelines that will follow for a proper design. 6.1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 6.2. Power Consumption UL865-N3G V2 Mode Average (mA) Mode description SWITCHED OFF Module supplied but Switched Off Switched Off 180 uA IDLE mode (WCDMA) AT+CFUN=5 1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 6.3.1.1. + 5V input Source Power Supply Design Guidelines      The desired output for the power supply is 3.8V, hence there's not a big difference between the input source and the desired output and a linear regulator can be used. A switching power supply will not be suited because of the low drop out requirements. When using a linear regulator, a proper heat sink shall be provided in order to dissipate the power generated.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 6.3.1.1. + 12V input Source Power Supply Design Guidelines         The desired output for the power supply is 3.8V, hence due to the big difference between the input source and the desired output, a linear regulator is not suited and shall not be used. A switching power supply will be preferable because of its better efficiency especially with the 2A peak current load represented by the UL865-N3G V2.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 6.3.1.1. Battery Source Power Supply Design Guidelines The desired nominal output for the power supply is 3.8V and the maximum voltage allowed is 4.2V, hence a single 3.7V Li-Ion cell battery type is suited for supplying the power to the Telit UL865-N3G V2 module. WARNING: The three cells Ni/Cd or Ni/MH 3,6 V Nom.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 6.3.2. Thermal Design Guidelines The thermal design for the power supply heat sink should be done with the following specifications:  Average current consumption during HSDPA transmission @PWR level max : 600 mA  Average current during idle: 1.5 mA NOTE: The average consumption during transmissions depends on the power level at which the device is requested to transmit by the network.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 6.3.3. Power Supply PCB layout Guidelines As seen on the electrical design guidelines the power supply shall have a low ESR capacitor on the output to cut the current peaks and a protection diode on the input to protect the supply from spikes and polarity inversion. The placement of these components is crucial for the correct working of the circuitry. A misplaced component can be useless or can even decrease the power supply performances.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20  The power supply input cables should be kept separate from noise sensitive lines such as microphone/earphone cables.  The insertion of EMI filter on VBATT pins is suggested in those designs where antenna is placed close to battery or supply lines. A ferrite bead like Murata BLM18EG101TN1 or Taiyo Yuden P/N FBMH1608HM101 can be used for this purpose.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 7. Radio Section 7.5. TX Output Power Band WCDMA FDD B2, B5 7.6. Sensitivity Band WCDMA FDD B2 WCDMA FDD B5 7.7. Power Class Class 3 (0.25W) Typical -110 dBm -111 dBm Note BER <0.1% BER <0.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 7.7.1. UL865-N3G V2 Antenna – PCB line Guidelines When using the Telit UL865-N3G V2 module, since there's no antenna connector on the module, the antenna must be connected to the UL865-N3G V2 through the PCB with the antenna pad (pin 34).
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 7.8. PCB Guidelines in case of FCC certification In the case FCC certification is required for an application using UL865-N3G V2, according to FCC KDB 996369 for modular approval requirements, the transmission line has to be similar to that implemented on UL865-N3G V2 interface board and described in the following chapter. 7.8.1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 7.8.2. Transmission line measurements HP8753E VNA (Full-2-port calibration) has been used in this measurement session. A calibrated coaxial cable has been soldered at the pad corresponding to RF output; a SMA connector has been soldered to the board in order to characterize the losses of the transmission line including the connector itself. During Return Loss / impedance measurements, the transmission line has been terminated to 50 Ω load.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 Line input impedance (in Smith Chart format, once the line has been terminated to 50 Ω load) is shown in the following figure: Insertion Loss of G-CPW line plus SMA connector is shown below: Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 37 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 7.9. Antenna - Installation Guidelines Install the antenna in a place covered by the GSM / WCDMA signal. If the device antenna is located farther than 20cm from the human body and there are no colocated transmitter then the Telit FCC/IC approvals can be re-used by the end product.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 8. Logic level specifications Where not specifically stated, all the interface circuits work at 1.8V CMOS logic levels. The following table shows the logic level specifications used in the UL865-N3G V2 interface circuits: Absolute Maximum Ratings -Not Functional Parameter Min Max Input level on any digital pin -0.3V +2.1V (CMOS 1.8) when on Operating Range - Interface levels (1.8V CMOS) Level Min Max Input high level 1.5V 1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 8.5. Reset signal Signal Function I/O pin RESET* Phone reset I 47 RESET* is used to reset the UL865-N3G V2. Whenever this signal is pulled low, the UL865N3G V2 is reset. When the device is reset it stops any operation. After the release of the reset UL865-N3G V2 is unconditionally shut down, without doing any detach operation from the network where it is registered.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 9. USB Port The UL865-N3G V2 includes one integrated universal serial bus (USB) transceiver. 9.1. USB 2.0 HS This port is compliant with the USB 2.0 HS only. The following table is listing the available signals: PAD Signal I/O Function Type 18 USB_D+ I/O USB differential Data (+) 3.3V 17 USB_D- I/O USB differential Data (-) 3.3V 6 VUSB AI Power sense for the internal USB transceiver. 5V NOTE Accepted range: 4.4V to 5.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 10. SPI Port The UL865-N3G V2 Module is provided by one SPI interface. The SPI interface defines two handshake lines for flow control and mutual wake-up of the modem and the Application Processor: SRDY (slave ready) and MRDY (master ready). The AP has the master role, that is, it supplies the clock.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 11. Serial Ports The serial port on the UL865-N3G V2 is the core of the interface between the module and OEM hardware. 2 serial ports are available on the module:  MODEM SERIAL PORT 1 (Main, ASC0)  MODEM SERIAL PORT 2 (Auxiliary, ASC1) 11.1. MODEM SERIAL PORT 1 Several configurations can be designed for the serial port on the OEM hardware, but the most common are:  RS232 PC com port  microcontroller UART @ 1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 The signals of the UL865-N3G V2 serial port are: RS232 Pin Number Signal UL865-N3G V2 Pad Number Name 1 DCD - dcd_uart 1 Data Carrier Detect 2 RXD - tx_uart 8 Transmit line *see Note 3 TXD - rx_uart 7 Receive line *see Note 4 DTR - dtr_uart 4 Data Terminal Ready 5 GND 32, 33, 35, 36, 46 Ground 6 DSR - dsr_uart 3 Data Set Ready 7 RTS -rts_uart 5 Request to Send 8 CTS - cts_uart 6 Clear to Send 9 RI - ri_uart 2
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 NOTE: According to V.24, RX/TX signal names are referred to the application side, therefore on the UL865-N3G V2 side these signal are on the opposite direction: TXD on the application side will be connected to the receive line (here named TXD/ rx_uart ) of the UL865-N3G V2 serial port and vice versa for RX.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 11.3. RS232 level translation In order to interface the UL865-N3G V2 with a PC com port or a RS232 (EIA/TIA-232) application a level translator is required. This level translator must: invert the electrical signal in both directions; change the level from 0/1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 An example of RS232 level adaptation circuitry could be done using a MAXIM transceiver (MAX218). In this case the chipset is capable to translate directly from 0/1.8V to the RS232 levels (Example done on 4 signals only). The RS232 serial port lines are usually connected to a DB9 connector with the following layout: Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 47 of 70 Mod.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 12. Audio Section Overview The Base Band Chip of the UL865-N3G V2 provides one Digital Audio Interface. Please refer to the UL865-N3G V2 DVI Application Note for additional details on this function. 13.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 WARNING: During power up the GPIOs may be subject to transient glitches. Also the UART‘s control flow pins can be usable as GPI/O. Pin Signal I/O Function 1 GPO_A O Configurable GPO 2 GPO_B O Configurable GPO 3 GPO_C O Configurable GPO 4 GPI_E I Configurable GPI 5 GPI_F I Configurable GPI 6 GPO_D O Configurable GPO Type CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 13.1. GPIO Logic levels Where not specifically stated, all the interface circuits work at 1.8V CMOS logic levels. The following table shows the logic level specifications used in the UL865-N3G V2 interface circuits: Absolute Maximum Ratings -Not Functional Parameter Min Max Input level on any digital pin -0.3V +2.1V (CMOS 1.8) when on Operating Range - Interface levels (1.8V CMOS) Level Min Max Input high level 1.5V 1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 13.2. Using a GPIO Pad as INPUT The GPIO pads, when used as inputs, can be connected to a digital output of another device and report its status, provided this device has interface levels compatible with the 1.8V CMOS levels of the GPIO. If the digital output of the device to be connected with the GPIO input pad has interface levels different from the 1.8V CMOS, then it can be buffered with an open collector transistor with a 47K pull up to 1.8V.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 13.4. Indication of network service availability The STAT_LED pin status shows information on the network service availability and Call status. The function is available as alternate function of GPIO_08 (to be enabled using the AT#GPIO=8,0,2 command). In the UL865-N3G V2 modules, the STAT_LED needs an external transistor to drive an external LED. Therefore, the status indicated in the following table is reversed with respect to the pin status.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 13.5. SIMIN detect function All the GPIO pins can be used as SIM DETECT input. The AT Command used to enable the function is: AT#SIMINCFG Use the AT command AT#SIMDET=2 to enable the SIMIN detection Use the AT command AT&W0 and AT&P0 to store the SIMIN detection in the common profile. For full details see AT Commands Reference Guide, 80000ST10025a.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 14. DAC and ADC section 14.1. DAC Converter 14.1.1. Description The UL865-N3G V2 provides a Digital to Analog Converter. The signal (named DAC_OUT) is available on pin 15 of the UL865-N3G V2. The on board DAC is a 10 bit converter, able to generate an analogue value based on a specific input in the range from 0 up to 1023. However, an external low-pass filter is necessary Voltage range (filtered) Range Min 0 0 Max 1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 14.1.2. Enabling DAC An AT command is available to use the DAC function. The command is: AT#DAC= [ [, ]] - scale factor of the integrated output voltage (0..1023 - 10 bit precision) it must be present if =1 Refer to SW User Guide or AT Commands Reference Guide for the full description of this function. NOTE: The DAC frequency is selected internally. D/A converter must not be used during POWERSAVING. 14.1.3.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 14.2. ADC Converter 14.2.1. Description The UL865-N3G V2 is provided by two A/D converters. They are able to read a voltage level in the range of 0÷1.2 volts applied on the ADC pin input, store and convert it into 10 bit word. The following table is showing the ADC characteristics: Input Voltage range AD conversion Input Resistance Input Capacitance Min 0 1 - Typical Max 1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 14.3. VAUX Power Output A regulated power supply output is provided in order to supply small devices from the module. The signal is present on Pad 43 and it is in common with the PWRMON (module powered ON indication) function. This output is always active when the module is powered ON. The operating range characteristics of the supply are: Level Output voltage Output current Output bypass capacitor (inside the module) Min Typical Max 1.78V 1.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 15. Mounting Board 15.1. General the UL865-N3G V2 on your The UL865-N3G V2 modules have been designed to be compliant with a standard lead-free SMT process. 15.2. Module finishing & dimensions Pin 1 Lead-free Alloy: Surface finishing Ni/Au for all solder pads Bottom View Dimensions in mm Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 58 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 15.3. Recommended foot print for the application In order to easily rework the UL865-N3G V2 is suggested to consider on the application a 1.5 mm placement inhibited area around the module. It is also suggested, as common rule for an SMT component, to avoid having a mechanical part of the application in direct contact with the module. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 15.4. Stencil Stencil’s apertures layout can be the same of the recommended footprint (1:1), we suggest a thickness of stencil foil ≥ 120µm. 15.5. PCB pad design Non solder mask defined (NSMD) type is recommended for the solder pads on the PCB. Copper Pad Pad Solder Mask PCB SMD (Solder Mask Defined) NSMD (Non Solder Mask Defined) Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 15.6. Recommendations for PCB pad dimensions (mm): Solder resist opening It is not recommended to place via or micro-via not covered by solder resist in an area of 0.3 mm around the pads unless it carries the same signal of the pad itself (see following figure). Inhibit area for micro-via Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 61 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 Holes in pad are allowed only for blind holes and not for through holes. Recommendations for PCB pad surfaces: Finish Layer thickness [µm] Electro-less Ni / Immersion Au 3 –7 / 0.03 – 0.15 Properties good solder ability protection, high shear force values The PCB must be able to resist the higher temperatures which are occurring at the lead-free process. This issue should be discussed with the PCB-supplier.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 Profile Feature Average ramp-up rate (TL to TP) Preheat – Temperature Min (Tsmin) – Temperature Max (Tsmax) – Time (min to max) (ts) Tsmax to TL – Ramp-up Rate Time maintained above: – Temperature (TL) – Time (tL) Peak Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Time 25°C to Peak Temperature (ttp) Pb-Free Assembly 3°C/second max 150°C 200°C 60-180 seconds 3°C/second max 217°C 60-150 seconds 245 +0/-5°C 10-30 sec
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 16. Packing system 16.1. Packing on tray The UL865-N3G V2 modules are packaged on trays of 20 pieces each. These trays can be used in SMT processes for pick & place handling. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 64 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 65 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 16.2. Packing in Reel Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 66 of 70 Mod. 0805 2011-07 Rev.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 16.3. Moisture sensitivity The moisture sensitivity level of the Product is “3” according with standard IPC/JEDEC JSTD-020, take care of all the relative requirements for using this kind of components. Moreover, the customer has to take care of the following conditions: a) The shelf life of the Product inside of the dry bag is 12 months from the bag seal date, when stored in a non-condensing atmospheric environment of < 40°C and < 90% RH.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 17. SAFETY RECOMMANDATIONS READ CAREFULLY Be sure the use of this product is allowed in the country and in the environment required. The use of this product may be dangerous and has to be avoided in the following areas: Where it can interfere with other electronic devices in environments such as hospitals, airports, aircrafts, etc.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 18. FCC/IC REGULATORY NOTICES Modification statement Telit has not approved any changes or modifications to this device by the user. Any changes or modifications could void the user’s authority to operate the equipment. Telit n’approuve aucune modification apportée à l’appareil par l’utilisateur, quelle qu’en soit la nature. Tout changement ou modification peuvent annuler le droit d’utilisation de l’appareil par l’utilisateur.
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UL865-N3G Hardware User Guide 1VV0301177 Rev 2– 2015-04-20 L'émetteur ne doit pas être colocalisé ni fonctionner conjointement avec à autre antenne ou autreémetteur. FCC Class B digital device notice This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.