User's Manual

UE866 HARDWARE USER GUIDE 1vv0301157 Rev.7 • 2015-04-17 34 of 68
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SPI
The UE866 Module is provided by one SPI interface.
The SPI interface defines two handshake lines for flow control and mutual wake-up of the modem and
the Application Processor: SRDY (slave ready) and MRDY (master ready).
The AP has the master role, that is, it supplies the clock.
The following table is listing the available signals:
PAD
Signal
I/O
Function
Type
NOTE
C1
SPI_MOSI
I
SPI MOSI
CMOS 1.8V
Shared with TX_AUX
C2
SPI_MISO
O
SPI MISO
CMOS 1.8V
Shared with RX_AUX
F11
SPI_CLK
I
SPI Clock
CMOS 1.8V
D11
SPI_MRDY
I
SPI_MRDY
CMOS 1.8V
E11
SPI_SRDY
O
SPI_SRDY
CMOS 1.8V
NOTE:
Due to the shared functions, when the SPI port is used, it is not possible to use
the AUX_UART port.
SPI Connections
SPI_MISO
SPI_MOSI
SPI_CLK
SPI_MRDY
SPI_SRDY
C2
C1
F11
D11
E11
UE866
AP