User's Manual

LE920A4 HW User Guide Hardware Interfaces
Doc#: 1VV0301261 Ethernet Connectivity (optional)
Rev. 4.3 Page 71 of 123 2017-12-07
Further details will be provided in a future release of this document.
Ethernet Connectivity (optional)
Ethernet connectivity can be optionally added to LE920A4 by adding an external PHY.
PHY connectivity uses SGMII interface for Data and a few additional signals for PHY
control.
Further details can be found at Ref 8: High-Speed Inter-Chip USB Electrical Specification,
version 1.0
8.3.1. SGMII Interface
The LE920A4 module includes an integrated Ethernet MAC with an SGMII interface,
having the following key features:
• The SGMII interface can be used to connect to an external Ethernet PHY or an
external switch.
• When enabled, an additional network interface is available to the Linux kernel’s
router.
8.3.2. Ethernet Control Interface
When using an external PHY for Ethernet connectivity, the LE920A4 also includes the
control interface to manage this external PHY.
Table 26 lists the signals for controlling the external PHY.
Table 26: Ethernet Control Interface Signals
PAD Signal I/O Function Type COMMENT
G14 MAC_MDC O MAC to PHY Clock 2.85V
G12 MAC_MDIO I/O MAC to PHY Data 2.85V
G8 ETH_RST_N O Reset to Ethernet PHY 2.85V
G10 ETH_INT_N I Interrupt from Ethernet PHY 1.8V
NOTE:
The Ethernet control interface is internally (inside SoC) shared with the
USIM2 port! When Ethernet PHY is used, the USIM2 port cannot be used
(and vice versa).