User's Manual

LE910 Hardware User Guide
1vv0301089 Rev.7 – 25-10-2015
Reproduction forbidden without Telit Communications S.p.A. written authorization - All Rights Reserved page 62 of 88
14 General Purpose I/O
The LE910 module is provided by a set of Digital Input / Output pins
Input pads can only be read; they report the digital value (high or low) present on the pad at the
read time.
Output pads can only be written or queried and set the value of the pad output.
An alternate function pad is internally controlled by the LE910 firmware and acts depending on
the function implemented.
The following table shows the available GPIO on the LE910:
PAD
Signal
I/O
Function
Type
Drive
strength
Note
C8
GPIO_01
I/O
Configurable GPIO
CMOS 1.8V
1 mA
C9
GPIO_02
I/O
Configurable GPIO
CMOS 1.8V
1 mA
C10
GPIO_03
I/O
Configurable GPIO
CMOS 1.8V
1 mA
C11
GPIO_04
I/O
Configurable GPIO
CMOS 1.8V
1 mA
B14
GPIO_05
I/O
Configurable GPIO
CMOS 1.8V
1 mA
C12
GPIO_06
I/O
Configurable GPIO
CMOS 1.8V
1 mA
C13
GPIO_07
I/O
Configurable GPIO
CMOS 1.8V
1 mA
K15
GPIO_08
I/O
Configurable GPIO
CMOS 1.8V
1 mA
L15
GPIO_09
I/O
Configurable GPIO
CMOS 1.8V
1 mA
G15
GPIO_10
I/O
Configurable GPIO
CMOS 1.8V
1 mA
NOTE:
In order to avoid a back powering effect it is recommended to avoid having any HIGH logic
level signal applied to the digital pins of the LE910 when the module is powered off or during
an ON/OFF transition.
14.1 GPIO Logic levels
Where not specifically stated, all the interface circuits work at 1.8V CMOS logic levels.
The following table shows the logic level specifications used in the LE910 interface circuits: