User's Manual

HE910 Hardware User Guide
1vv0300925 Rev.9 – 07-02-2012
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9 SPI port
The HE910 Module is provided by one SPI interface.
The SPI interface defines two handshake lines for flow control and mutual wake-up of the
modem and the Application Processor: SRDY (slave ready) and MRDY (master ready).
The AP has the master role, that is, it supplies the clock.
The following table is listing the available signals:
PAD
Signal
I/O
Function
Type
COMMENT
D15
SPI_MOSI
I
SPI MOSI
CMOS 1.8V
Shared with TX_AUX
E15
SPI_MISO
O
SPI MISO
CMOS 1.8V
Shared with RX_AUX
F15
SPI_CLK
I
SPI Clock
CMOS 1.8V
H15
SPI_MRDY
I
SPI_MRDY
CMOS 1.8V
J15
SPI_SRDY
O
SPI_SRDY
CMOS 1.8V
The signal VIO1_1V8 must be connected to the VDD_IO1 input pin to properly supply this
digital section.
NOTE:
Due to the shared functions, when the SPI port is used, it is not possible to use the
AUX_UART port.