User's Manual
GE864
GE864GE864
GE864-
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-QUAD V2 / GE864
QUAD V2 / GE864QUAD V2 / GE864
QUAD V2 / GE864-
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-DUAL V2 Hardware User Guide
DUAL V2 Hardware User GuideDUAL V2 Hardware User Guide
DUAL V2 Hardware User Guide
1vv0300875 Rev.1 – 2010-03-29
Reproduction forbidden without Telit Communications S.p.A. written authorization - All Rights Reserved. Page 12 of 73
4. GE864-QUAD V2 / GE864-DUAL V2 Module Connections
4.1. PIN-OUT
The GE864-QUAD V2 / GE864-DUAL V2 uses 11x11 array BGA technology connection
Ball
BallBall
Ball
Signal
SignalSignal
Signal
I/O
I/OI/O
I/O
Function
FunctionFunction
Function
Internal
Internal Internal
Internal
PULL UP
PULL UPPULL UP
PULL UP
Type
TypeType
Type
Audio
AudioAudio
Audio
F9
F9F9
F9
AXE I Handsfree switching 100K CMOS 2.8V
G8
G8G8
G8
MIC_HF+ AI Handsfree mic. input; phase +, nom. level 3mVrms Audio
G9
G9G9
G9
MIC_MT- AI Handset mic.signal input; phase-, nom. level 50mVrms
Audio
G10
G10G10
G10
EAR_MT+ AO Handset earphone signal output, phase + Audio
J8
J8J8
J8
MIC_MT+ AI Handset mic.signal input; phase+, nom. level 50mVrms
Audio
J9
J9J9
J9
MIC_HF- AI Handsfree mic.input; phase -, nom. level 3mVrms Audio
J10
J10J10
J10
EAR_HF- AO Handsfree ear output, phase - Audio
H9
H9H9
H9
EAR_MT- AO Handset earphone signal output, phase - Audio
H10
H10H10
H10
EAR_HF+ AO Handsfree ear output, phase + Audio
SIM card interface
SIM card interfaceSIM card interface
SIM card interface
C10
C10C10
C10
SIMCLK O External SIM signal – Clock 1,8 / 3V
C11
C11C11
C11
SIMIN I External SIM signal - Presence (active low)
Pull up 47K
1,8 / 3V
D4
D4D4
D4
SIMVCC - External SIM signal – Power supply for the SIM 1,8 / 3V
D10
D10D10
D10
SIMIO I/O External SIM signal - Data I/O
Pull up
4.7K
1,8 / 3V
E9
E9E9
E9
SIMRST O External SIM signal – Reset 1,8 / 3V
Trace
TraceTrace
Trace
D11
D11D11
D11
TX_TRACE O TX Data for debug monitor CMOS 2.8V
F10
F10F10
F10
RX_TRACE I RX Data for debug monitor CMOS 2.8V
H4
H4H4
H4
SERVICE I
Service pin shall be used to upgrade the module
from ASC1 (RX_TRACE, TX_TRACE). The pin
shall be tied low to enable the feature only in
case of a SW Update activity. It is required, for
debug purpose, to be connected
to a test pad on the final application.
CMOS 2.8V
Prog. / Data + HW Flow Control
Prog. / Data + HW Flow ControlProg. / Data + HW Flow Control
Prog. / Data + HW Flow Control
B6
B6B6
B6
C125/RING O Output for Ring indicator signal (RI) to DTE CMOS 2.8V
B7
B7B7
B7
C108/DTR I Input for Data terminal ready signal (DTR) from DTE CMOS 2.8V
D9
D9D9
D9
C109/DCD O Output for Data carrier detect signal (DCD) to DTE CMOS 2.8V
E7
E7E7
E7
C103/TXD I Serial data input (TXD) from DTE CMOS 2.8V
E11
E11E11
E11
C107/DSR O Output for Data set ready signal (DSR) to DTE CMOS 2.8V
F7
F7F7
F7
C105/RTS I Input for Request to send signal (RTS) from DTE CMOS 2.8V
F6
F6F6
F6
C106/CTS O Output for Clear to send signal (CTS) to DTE CMOS 2.8V
H8
H8H8
H8
C104/RXD O Serial data output to DTE CMOS 2.8V
DA
DADA
DAC and ADC
C and ADCC and ADC
C and ADC
C7
C7C7
C7
DAC_OUT AO Digital/Analog converter output D/A
J11
J11J11
J11
ADC_IN1 AI Analog/Digital converter input A/D
H11
H11H11
H11
ADC_IN2 AI Analog/Digital converter input A/D