User's Manual

CE910-DUAL Hardware User Guide

1vv0301010 Rev .0 – 2012-07-10

Average current consumption during CDMA 1x @PWR level max : 750 mA

NOTE:

The average consumption during transmissions depends on the power level at which the

device is requested to transmit via the network. The average current consumption hence varies

significantly.

Considering the very low current during idle, especially if the Power Saving function is

enabled, it is possible to consider from the thermal point of view that the device absorbs

current significantly only during calls.

If we assume that the device stays in transmission for short periods of time (a few minutes)

and then remains for quite a long time in idle (one hour), then the power supply always has

time to cool down between the calls and the heat sink could be smaller than the calculated for

750mA maximum RMS current. There could even be a simple chip package (no heat sink).

Moreover in average network conditions the device is requested to transmit at a lower power

level than the maximum and hence the current consumption will be less than 750 mA (usually

around 300 mA).

For these reasons the thermal design is rarely a concern and the simple ground plane where

the power supply chip is placed can be enough to ensure a good thermal condition and avoid

overheating.

The heat generated by the CE910-DUAL must be taken into consideration during

transmission at 24.5dBm max during calls. This generated heat will be mostly conducted to

the ground plane under the CE910-DUAL. The application must be able to dissipate heat.

In the CDMA 1x mode, since CE910-DUAL emits RF signals continuously during

transmission, special attention must be paid to how to dissipate the heat generated.

The current consumption will be up to about 750mA in CDMA 1x continuously at the

maximum TX output power (24.5dBm). Thus, you must arrange the area on the application

PCB must be as large as possible under CE910-DUAL.

The CE910-DUAL must be mounted on the large ground area of the application board and

make many ground vias to dissipate the heat.

5.2.6. Power Supply PCB layout Guidelines

As seen in the electrical design guidelines, the power supply must have a low ESR capacitor

on the output to cut the current peaks and a protection diode on the input to protect the supply

from spikes and polarity inversion. The placement of these components is crucial for the

correct operation of the circuitry. A misplaced component can be useless or can even decrease

the power supply performance.

 The bypass low ESR capacitor must be placed close to the Telit CE910-DUAL

power input pads, or if the power supply is a switching type, the capacitor can be

placed close to the inductor to cut the ripple if the PCB trace from the capacitor to

CE910-DUAL is wide enough to ensure a drop-less connection even during the

1A current peaks.