User's Manual

Telink TLSR825XML32D User Manual
5
1.3 GPIO Pin layout
Figure 1 Pin layout
Pin definition is shown as the Table 1:
Table 1 Pin definition
Pin
No
Module Pin Name
Chip Pin Name
Description
J1
1
TL_GPIO2
SPI_CN/I2S_LR/PWM3/PD<2>
SPI chip select (Active low) / I2S
left right channel select / PWM3
output / GPIO PD[2]
2
TL_GPIO1
PWM1_N/I2S_SDI/7816_TRX
(UART_TX)/PD<3>
PWM1 inverting output / I2S
serial data input / UART 7816
TRX (UART_TX) / GPIO PD[3]
3
TL_GPIO0
SWM/I2S_SDO/PWM2_N/
PD<4>
Single wire master / I2S serial
data output / PWM2 inverting
output / GPIO PD[4]
4
TL_Grant
SPI_CK/I2S_BCK/7816_TRX
(UART_TX)/PD<7>
SPI clock (I2C_SCK) / I2S bit clock
/ UART 7816 TRX (UART_TX) /
GPIO PD[7]
5
TL_Priority
DMIC_DI/PWM0_N/UART_RX/
PA<0>
DMIC data input / PWM0
inverting output / UART_RX /
GPIO PA[0]
6
TL_Request
DMIC_CLK/7816_CLK/I2S_CLK/
PA<1>
DMIC clock / UART 7816 clock
/ I2S clock / GPIO PA[1]