Specifications

Telink 8258 Dongle Specification
PS-19012802-E1 8 Ver1.0.0
Table 1 Pin definition
Pin No
Dongle Pin
Name
Chip Pin Name
Description
J5
1
TL_A0
PWM0_N/UART_RX/PA<0>
PWM0 inverting output / UART_RX /
GPIO PA[0]
2
TL_D7
UART_TX /PD<7>
UART_TX / GPIO PD[7]
J9
1
TL_C3
PWM1/UART_RX/I2C_SCK/XC32K_I/
PC<3>
PWM1 output / UART_RX / I2C serial
clock / (optional) 32kHz crystal input /
GPIO PC[3]
2
TL_C2*
1
PWM0/UART_TX/I2C_SDA/XC32K_O/
PC<2>
PWM0 output / UART_TX / I2C serial
data / (optional) 32kHz crystal output /
GPIO PC[2]
J10
1
TL_B2
PWM5/UART_CTS/RX_CYC2LNA/
lc_comp_ain<2>/sar_aio<2>/PB<2>
PWM5 output / UART_CTS / Control
external LNA / Low power comparator
input / SAR ADC input / GPIO PB[2]
2
TL_B3
PWM0_N/UART_RTS/TX_CYC2PA/
lc_comp_ain<3>/sar_aio<3>/PB<3>
PWM0 inverting output / UART_RTS /
Control external PA / Low power
comparator input / SAR ADC input /
GPIO PB[3]
3
TL_B4
PWM4/lc_comp_ain<4>/
sar_aio<4>/PB<4>
PWM4 output / Low power
comparator input / SAR ADC input /
GPIO PB[4]
4
TL_B5
PWM5/lc_comp_ain<5>/
sar_aio<5>/PB<5>
PWM5 output / Low power
comparator input / SAR ADC input /
GPIO PB[5]
J11
1
TL_C6
RX_CYC2LNA/ PWM4_N/PC<6>
Control external LNA /PWM4 inverting
output / GPIO PC[6]
2
TL_C7
TX_CYC2PA/ PWM5_N/PC<7>
Control external PA /PWM5 inverting
output / GPIO PC[7]
1
For 8258 chips with lot No. of EP5682.20 (VID=0x01, 1827 ≤ Data code < 1844), since PC2 is pulled down by an
internal diode, all of its functions cannot act normally.
For 8258 chips with lot No. of EP6070.20 (VID=0x03, Date code≥1844), PC2 function bug has already been fixed.
TLSR8258
F512ET48
THYYWW
EP6070.20
Date Code:
Year + Week
Lot No.