User manual

MAUI Oscilloscopes Remote Control and Automation Manual
Short Long Subsystem What The Command or Query Does
DRAV
DD_RESET_AVERAGE DDA Resets the averaged data and all sweeps; clears his-
tograms and parameters; allows the start of a fresh ana-
lysis.
DRCC
DD_READCLOCK_CHANNEL DDA Specifies the input channel to which Read Clock is con-
nected or the memory in which it is stored.
DRGC
DD_READGATE_CHANNEL DDA Specifies the input channel to which Read Gate is con-
nected or the memory in which it is stored.
DRGP
DD_READ_GATE_POLARITY DDA Selects the polarity of the Read Gate signal.
DRLE
DD_ML_RUN_LENGTH_LIMIT DDA Limits the run length, the number of “0” values in a row
for the head/analog signal when channel emulation is
active.
DRLM
DD_ML_MIN_SPACING DDA When channel emulation is active, this sets the min-
imum allowed spacing of transitions.
DSAV
DD_START_AVERAGING DDA Changes the state of the “Avg. Samples” switch on the
Graph menu.
DSEG
DD_BYTE_OFFSET_SEGMENT DDA Moves the head trace to show the specified segment.
DSF
DD_SHOW_FILTERED DDA Enables and disables the filtering of the head signal.
DSIG
DD_SIGNAL_TYPE DDA Specifies Peak Detect or a particular PRML format for the
head signal.
DSLV
DD_SHOW_LEVELS DDA Displays the level markers indicating the Viterbi levels of
the ML samples when channel emulation is active.
DSML
DD_SHOW_ML DDA Displays/hides ML markers
DSPH
DD_SAMPLE_PHASE DDA Adjusts the phase between the DDFA PLL sample points
and an external clock reference (when RCLK is con-
nected).
DSST
DD_SHOW_SAMPLE_TIMES DDA Shows vertical-line cursors on the grid at each sample
time corresponding to the read clock.
DST
DD_SAM_THRESH DDA Sets the SAM threshold value for channel emulation.
DSTR
DD_STORE_REFERENCE DDA
Stores the head signal to one of the DDA’s available
memories for analog compare and channel emulation
with reference.
DTF?
DD_TRAIN_FILTER DDA Commands the DDA to determine reasonable values for
each filter parameter.
DTJN
DOT_JOIN DISPLAY Controls the interpolation lines between data points.
DVSP
DD_VCO_SYNCH_PATTERN DDA Defines the number of bits per half-period in the syn-
chronization field.
DVTD
DD_VCOSYNCH_TO_DATA DDA Specifies the number of bytes on the analog head signal
waveform between the end of the VCO sync field and the
actual data.
*ESE
*ESE STATUS Sets the Standard Event Status Enable register (ESE).
*ESR?
*ESR? STATUS Reads, clears the Event Status Register (ESR).
EXR?
EXR? STATUS Reads, clears the EXecution error Register (EXR).
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