User Manual

46 QPHY-LPDDR2-OM-G Rev B
Write Bursts
tDQSS, DQS latching rising transitions to associated CK edge
CK rising edge at VREF level to DQS rising edge at VREF level, see Figure.
Figure 26. Burst write operation: WL=1 BL=4 [JESD209-2D figure 41]
tDQSH, DQS Input High Pulse Width
DQS High pulse width at VREF level, see Figure 26.
Figure 26. Data input (write) timing [JESD209-2D figure 40]
tDQSL, DQS Input Low Pulse Width
DQS Low pulse width at VREF level, see Figure 26.