User Manual
Table Of Contents
- Introduction TO QPHY-DDR3
- Signals measured
- DDR3 MEASUREMENT PREPARation
- Basic Functionality
- Using Qualiphy DDR3
- QualiPHY Compliance Test Platform
- QPHY-DDR3 Test Configurations
- 1) Clock tests DDR3-1333 (1 Probe)
- 2) CKdiff-DQse-DQSdiff 1333 Write Burst (3 Probes)
- 3) CKdiff-DQse-DQSdiff 1333 Read Burst (3 Probes)
- 4) Eye Diagram (3 Probes Debug)
- 5) Eye Diagram with CS Enabled (4 Probes Debug)
- 6) CKDiff-DQse-DQS-ADD/CTRLse (4 Probes Debug)
- 7) CKdiff-DQse-DQSp-DQsn (4 probes test, each DQS signal probed single ended)
- 8) CKp-CKn-DQse-DQSdiff (4 probe test, each CK signal is probed single ended)
- 9) Vref tests
- D1) Demo of All Tests
- QPHY-DDR3 Variables
- QPHY-DDR3 Limit Sets
- QPHY-DDR3 Tests
- Clock Tests
- tCK(avg), Average Clock Period
- tCK(abs), Absolute Clock Period
- tCH(avg), Average High Pulse Width
- tCL(avg), Average Low Pulse Width
- tCH(abs), Absolute High Pulse Width
- tCL(abs), Absolute Low Pulse Width
- tJIT(duty), Half Period Jitter
- tJIT(per), Clock Period Jitter
- tJIT(cc), Cycle to Cycle Period Jitter
- tERR(n per), Cumulative Error
- Eye Diagram
- Electrical Tests
- Timing Tests
- Four Probe tests measurements using ADDR/CTL
- Clock Tests
30 917717 Rev C
DQ Signal Name
Select name of data (DQ) SUT. Choose between available DDR signal names. Default is DQ0.
DQS Signal Name
Select name of strobe (DQS) SUT. Choose between available DDR signal names. Default is DQS0.
Clock Signal Name
Select name of clock (CK) SUT. Choose between available DDR signal names. Default is CK.
DUT Power Supply VDDQ
Value of VDDQ used to compute test limits as specified by Jedec standard. Default is 1.5 V.
4
th
Probe Names
Chip Select Signal Name
Select the name of the Chip Select SUT. Choose between available DDR signal names. Default is CS0.
Script Settings
Save Acquired Waveforms
Saved waveforms can be used later in demonstration or optimized version of script. Choose between Yes
or No. The default is No. This setting is ignored (no save) if using stored waveforms is enabled a nd in
Demo mode.
Silent mode control
No more interaction with the user when silent mode is on. Choose between Yes or No. Default is No. This
is useful to let the test run with out int er rupti on in the background.
Stop On Test to review results
When set to Yes, the script stops after each test allowing you to view the results. The setup is saved so
the oscilloscope settings can be modified by the user. On resume, the setup is recalled. An y ne w
acquisition done may cause the script to produce unexpected results.
Use Chi p Se lec t (re quir e on e more pr obe )
When set to Yes, the script will use the chip select signal to correctly identify read and write bursts in
multi-ranked systems. The chip select line is used in conjunction with the Overall Read Latency and
Overall Write Latency variables to correctly identify the proper read and write bursts .
Waveform Path
Specify the path on the oscilloscope to save/recall waveforms. When not in Demo Mode and when Save
acquired waveforms is enabled, the waveforms are saved in this folder. When set to Demo Mode or
when Use stored trace for pixel clock measure, wav ef orms are also available from this folder. The
default location is D:\Waveforms\DDR3.
Latency Setting
Overall Read Latency
This is used to specify the Delay between DDR command (Read) to first data bit of related read burst.
This is needed when using the Chip Select line to correctly identify read and write bursts in multi-ranked
systems. This latency is measured in clock periods.