User Manual
Table Of Contents
- Introduction TO QPHY-DDR3
- Signals measured
- DDR3 MEASUREMENT PREPARation
- Basic Functionality
- Using Qualiphy DDR3
- QualiPHY Compliance Test Platform
- QPHY-DDR3 Test Configurations
- 1) Clock tests DDR3-1333 (1 Probe)
- 2) CKdiff-DQse-DQSdiff 1333 Write Burst (3 Probes)
- 3) CKdiff-DQse-DQSdiff 1333 Read Burst (3 Probes)
- 4) Eye Diagram (3 Probes Debug)
- 5) Eye Diagram with CS Enabled (4 Probes Debug)
- 6) CKDiff-DQse-DQS-ADD/CTRLse (4 Probes Debug)
- 7) CKdiff-DQse-DQSp-DQsn (4 probes test, each DQS signal probed single ended)
- 8) CKp-CKn-DQse-DQSdiff (4 probe test, each CK signal is probed single ended)
- 9) Vref tests
- D1) Demo of All Tests
- QPHY-DDR3 Variables
- QPHY-DDR3 Limit Sets
- QPHY-DDR3 Tests
- Clock Tests
- tCK(avg), Average Clock Period
- tCK(abs), Absolute Clock Period
- tCH(avg), Average High Pulse Width
- tCL(avg), Average Low Pulse Width
- tCH(abs), Absolute High Pulse Width
- tCL(abs), Absolute Low Pulse Width
- tJIT(duty), Half Period Jitter
- tJIT(per), Clock Period Jitter
- tJIT(cc), Cycle to Cycle Period Jitter
- tERR(n per), Cumulative Error
- Eye Diagram
- Electrical Tests
- Timing Tests
- Four Probe tests measurements using ADDR/CTL
- Clock Tests
28 917717 Rev C
3) CKdif f-DQse-DQSdiff 1333 Read Burst (3 Probes)
This configuration runs all of the tests that are run on read bursts of the DDR3 signals in which 3 probes
are required. All of the variables are set to their defaults. The limit set in use is DDR3-1333. The tests run
are:
• Eye Diagram – Read Bursts (Outputs)
• SRQr
• SRQf
• tDQSQ
• tQH
• tDQSCK
4) Eye Diagram (3 Probes Debug)
This configuration runs the Eye Diagram tests on both the read bursts and the write bursts. All of the
variables are set to their defaults. The limit set in use is DDR3-1333. The tests run are:
• Eye Diagram – Write Bursts (Inputs)
• Eye Diagram – Read Bursts (Outputs)
5) Eye Diagram with CS Enabled (4 Probes Debug)
This configuration runs the Eye Diagram tests on both the read bursts and the write bursts. All of the
variables are set to their defaults except the Use Chip Select is set to Yes. The limit set in use is DDR3-
1333. The tests run are:
• Eye Diagram – Write Bursts (Inputs)
• Eye Diagram – Read Bursts (Outputs)
6) CKDiff-DQse-DQS-ADD/CTRLse (4 Probes Debug)
• SlewR
• SlewF
• VIH(ac/dc)
• VIL(ac/dc)
• VSWING
• AC Overshoot Peak Amplitude
• AC Overshoot Area above VDDQ
• AC Undershoot Peak Amplitude
• AC Undershoot Area below VSSQ
• tIS (base + derated)