Datasheet

Application Note
www.tektronix.com/bench14
Figure 28 shows the acquisition system analog signal
conditioning gain and offset are adjusted to provide a correctly
processed test ramp signal to the ADC. After the signal
conditioning adjustment the ADC input waveform maximum
dropped from 1.871 V to 1.838 V. Now there is only one 3F
hex value at each peak of the test ramp signal as expected.
The maximum input of the ADC is correctly operating.
In Figure 28, the ADC conversion time is easily seen in this
acquisition. The ADC conversion time is the time duration from
the analog input peak to when the 3F hex value appears at the
ADC outputs.
Figure 29 shows Wave Inspector searched for 00 hex value
which should be at each ramp signal valley. Three 00 hex
values were found, one at each valley of the test ramp signal
as expected. Lastly, the Wave Inspector left navigation arrow
key is used to jump to the first left mark 00 hex value event to
check the ADC bus details at the test ramp valley as seen in
Figure 29. The acquisition system is correctly operating with
a count down to the minimum 00 hex value and a count up
after the minimum. The bus values are saved to a .CSV
file and are checked with Microsoft Excel for missing or
duplicate values.
In this example, the MSO digital channels were decoded into
a clocked bus and Wave Inspector was used quickly to find,
or not find, the maximum and minimum ADC bus values. The
analog signal conditioning circuit was quickly identified as
being the source of the problem.
Figure 28. Correct operation with one 3F hex value at each ramp peak. Figure 29. Correct operation with one 00 hex value at each ramp valley.