Datasheet

Application Note
www.tektronix.com/oscilloscopes36
Working with Audio Buses
Support for digital audio buses is available on several Tektronix
oscilloscope product families (see Appendix A). Using a front
panel Bus button, we can define an audio bus by simply
entering basic bus parameters such as word size, signal
polarities, bit order, and thresholds. TDM definition also
requires the number of data bits per channel, clock bits per
channel, bit delay, and the number of channels per frame.
Once the bus is setup, you can quickly trigger on specific data
content on the bus, decode entire acquisitions and search
through acquisitions to find the specific data you’re looking
for. In the following example, we’re looking at an I
2
S bus being
driven by an analog to digital converter (ADC). Channel 1
(yellow) is the clock signal, channel 2 (cyan) is the word select
signal, and channel 3 (magenta) is the data signal. We’ve set
the trigger to look for data values outside a specified range to
see if the signal we’re sampling is hitting the limits of the ADC.
As Figure 48 shows, we did capture an extreme value (-128)
with this Outside Range trigger.
The oscilloscope's powerful audio triggering capability
includes the following types:
Word Select – trigger on the edge of Word Select that starts
the frame in I
2
S, LJ, and RJ buses
Frame Sync – trigger on the Frame Sync signal that starts a
frame in
TDM Data – trigger on user specified data in the Left Word,
Right Word, or Either Word in I
2
S, LJ, and RJ. With TDM,
you specify the channel number to look for the data value
in. Data qualifiers include =, , , <, >, , inside range, and
outside range.
As with all the other serial bus types supported by Tektronix
oscilloscopes, these trigger criteria are also available as search
criteria for investigating long acquisitions and the decoded
audio data can be presented in event table format.
MIPI DSI-1 / CSI-2 Buses
Background
Unlike a number of other standards in this document that have
been in the market for decades, Mobile Industry Processor
Interface (MIPI) standards are relatively new and, in some
cases, still evolving. The MIPI Alliance (www.mipi.org) states:
“These specifications establish standards for hardware and
software interfaces which drive new technology and enable
faster deployment of new features and services across the
mobile ecosystem.” “The mobile industry suffers from too
many interfaces which are incompatible yet typically not
differentiated. This leads to incompatibility between products,
redundant engineering investments to maintain multiple
interface technologies, and ultimately higher costs (but most
likely not higher margins/value). MIPI intends to reduce this
fragmentation by developing attractive targets for convergence
which have technical and intellectual property rights benefits
over proprietary alternatives.”
The MIPI Alliance has completed multiple specifications that
are being adopted by numerous mobile products. Two of
these, DSI-1 and CSI-2, are protocol-level specifications for
how information is transmitted between a host processor
and a display chip (DSI-1) and between a host processor
and a camera chip (CSI-2). Both protocols utilize the same
underlying physical layer interfaces developed by the MIPI
Alliance; D-PHY and M-PHY.
Figure 48. Triggering outside a range of values on an I
2
S bus.