Datasheet
www.tektronix.com/oscilloscopes 35
Debugging Serial Buses in Embedded System Designs
There are several variants of the I
2
S bus that are also
commonly used called Left Justified (LJ), Right Justified (RJ),
and Time Division Multiplexing (TDM). The major difference
between I
2
S, LJ, and RJ is where the data is placed in time
relative to the Word Select signal. With I
2
S, the MSB is delayed
one clock after WS. With LJ, the data bits are aligned with WS
and with RJ, the data bits are right aligned with WS. These are
all illustrated in Figure 46. TDM is similar to I
2
S, LJ, and RJ, but
allows for more than two audio channels. The example shown
in Figure 47 has eight audio channels, each with 32 data bits.
All of these digital audio buses have a very simple data
structure. Many of the other buses we’ve looked at in this
application note have address fields, CRC fields, parity bits,
start/stop bits, and various other indicator bits, but the digital
audio buses simply have data values for each channel.
Figure 47. TDM Format.
MSB
MSB
DAC_A1 DAC_B1 DAC_A2 DAC_A3 DAC_A4DAC_B2 DAC_B3 DAC_B4
MSB MSBLSB
LSB
WS
SCK
256 clks
32 clks
Data
zero
32 clks 32 clks 32 clks 32 clks 32 clks 32 clks 32 clks
SD
LSB LSB MSBLSB MSBLSB MSB MSB MSBLSB LSB LSB LSB