User's Manual

P330 Data Sheet / User Guide 15
DRAFT
3 Hardware Block Diagram
This section provides and discusses at a high level the P330 functional hardware block diagram
shown in Figure 3-1. Additional detail on the various interfaces is provided in Section 4.
Fig. 3-1: P330 hardware functional block diagram
DW1000
RF Port A
Processor
FPGA
P330
UWB Antenna
Temp
Serial
USB
USB Data Jack
Ethernet Jack
Ethernet
Can
J9
J5
Regulators
5-48Volts
Flash
and RAM
Memory
Blue LED
38.4MHz
Osc
USB Power Jack
SPI (5)
3.3V GPIO (3)
3.3V GPIO (3)
J10 User Mezzanine
- VCC_Main
- Power Enable
- Supply Ground
- Digital Ground
- SPI (5)
- Serial
- CAN
- ARM 3.3V GPIO (2)
- FPGA 3.3V GPIO (2)
J11 Locking Connector
- VCC_Main
- Supply Ground
- Digital Ground
- SPI (5)
- Serial
- CAN
- ARM 3.3V GPIO (1)
- FPGA 3.3V GPIO (3)
Power Enable
Ethernet RMII
J13
J8 Ethernet Mezzanine
- Digital Ground
- Ethernet
- ARM 1.8V GPIO (2)
- Ext 16MHz CLK (reserved)
1.8V GPIO (2)
1.8V GPIO (2)
J6 Factory Mezzanine
- Digital Ground
- FPGA 1.8V GPIO (2)
- ARM 3.3V GPIO (1)
- Factory Reserved
Chassis Ground
VCC_Main
Green LED
UWB Components
Non-UWB Component
User Interface
LEDs (4)