Integration Manual

TSD-19090601 - R15 Contents Page 96 of 143
35 um
35 um
35 um
35 um
270 um
270 um
760 um
L1 Copper
L3 Copper
L2 Copper
L4 Copper
FR-4 dielectric
FR-4 dielectric
FR-4 dielectric
350 um 40 0 um40 0 um350 um40 0 um
Figure 28: Example of USB line design, with Z
0
close to 90  and Z
CM
close to 30 , for the described 4-layer board layup
35 um
35 um
15 10 um
L2 Copper
L1 Copper
FR-4 dielectric
740 um 410 um410 um740 um410 um
Figure 29: Example of USB line design, with Z
0
close to 90  and Z
CM
close to 30 , for the described 2-layer board layup
2.6.2 UART interfaces
2.6.2.1 Guidelines for UART circuit design
4-wire UART
If RS-232 compatible signal levels are needed, the Maxim MAX13234E voltage level translator can be used.
This chip translates voltage levels from 1.8 V (module side) to the RS-232 standard.
If a 1.8 V external Processor / Device is used, the circuit should be implemented as shown in Figure 30.
TxD
1.8V Processor / Device
RxD
RTS
CTS
GND
TOBY-L3 series
TXDx
RXDx
RTSx
CTSx
GND
0 Ohm
TP
0 Ohm
TP
Figure 30: 4-wire UART interface application circuit to connect an external 1.8 V processor / device
If a 3.0 V external Processor / Device is used, then it is recommended to connect the 1.8 V UART interface
of the module by means of appropriate unidirectional voltage translators using the module V_INT output
as a 1.8 V supply for the voltage translators on the module side, as shown in Figure 31.