Integration Manual
Table Of Contents
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in 2G connected mode
- 1.5.1.3 VCC current consumption in 3G connected mode
- 1.5.1.4 VCC current consumption in LTE connected mode
- 1.5.1.5 VCC current consumption in cyclic low power idle mode / active mode
- 1.5.1.6 VCC current consumption in fixed active mode
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interfaces
- 1.9 Data communication interfaces
- 1.10 eMMC interface
- 1.11 Digital Audio interfaces
- 1.12 ADC interfaces
- 1.13 General Purpose Input/Output
- 1.14 Reserved pins (RSVD)
- 1.15 System features
- 1.15.1 Network indication
- 1.15.2 Jamming detection
- 1.15.3 IP modes of operation
- 1.15.4 Dual stack IPv4 and IPv6
- 1.15.5 Embedded TCP/IP and UDP/IP
- 1.15.6 Embedded FTP and FTPS
- 1.15.7 Embedded HTTP and HTTPS
- 1.15.8 SSL and TLS
- 1.15.9 Firmware update Over AT (FOAT)
- 1.15.10 Firmware update Over The Air (FOTA)
- 1.15.11 Power Saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for the external battery charging circuit
- 2.2.1.8 Guidelines for external charging and power path management circuit
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interfaces
- 2.6 Data communication interfaces
- 2.7 eMMC interface
- 2.8 Digital Audio interface
- 2.9 ADC interfaces
- 2.10 General Purpose Input/Output
- 2.11 Reserved pins (RSVD)
- 2.12 Module placement
- 2.13 Module footprint and paste mask
- 2.14 Thermal guidelines
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- 6 FCC Notes
- Appendix
- Glossary
- Related documents
- Revision history
- Contact
TOBY-L3 series - System Integration Manual
TSD-19090601 - R13 System Integration Manual Page 50 of 143
dedicated DDC (I
2
C) interface. An interface connected to the positioning device is not necessary: the cellular
module allows full control of the GNSS device.
The modules provide embedded GNSS aiding that is a set of specific features developed by u-blox to
improve the cellular / GNSS system power consumption and the GNSS performance, decreasing the Time-
To-First-Fix (TTFF), thus allowing to calculate the position in shorter time with higher accuracy.
The cellular modules provide additional custom functions over GPIO pins to improve the integration with
u-blox positioning chips and modules (see section 1.13). GPIO pins can handle:
“GNSS supply enable” function provided by GPIO2, improving the power consumption of the positioning
device: when the GNSS functionality is not required, the external positioning device can be completely
switched off by the cellular module
“GNSS Tx data ready” function provided by GPIO3, improving the power consumption of the cellular
module: when low power idle mode is enabled in the cellular module, the GNSS device can wake up the
cellular module notifying that it is ready to send data by the DDC (I
2
C) interface, so the cellular module
does not lose the data sent by the GNSS device even if low power idle mode is enabled
1.9.4.2 I2C1 interface
The SDA1 and SCL1 pins represent the I2C1 I
2
C bus compatible Display Data Channel (DDC) interface, with
the module acting as the I
2
C master, available for
communication with other external I
2
C devices by means of open CPU API
I2C1 interface pins of the module are open drain outputs conforming to the I
2
C bus specifications [7],
supporting up to 100 kbit/s data rate in Standard-mode, and up to 400 kbit/s data rate in Fast-mode.
External pull-up resistors to a suitable 1.8 V supply (e.g. V_INT) are required for operations.
1.9.5 SDIO interface
TOBY-L3 series modules include a 4-bit Secure Digital Input Output interface (SDIO_D0, SDIO_D1, SDIO_D2,
SDIO_D3, SDIO_CLK, SDIO_CMD), where the module acts as an SDIO host controller designed to
communicate with compatible u-blox short range radio communication modules by means of the open
CPU API
communicate with external SDIO devices by means of the open CPU API
The SDIO interface supports up to SD 3.0 SDR104 bus speed mode.
Combining the TOBY-L3 cellular module with a u-blox short range communication module gives designers
full access to the Wi-Fi module directly via the cellular module, so that a second interface connected to the
Wi-Fi module is not necessary. The cellular module allows a full control of the Wi-Fi module, because Wi-
Fi control messages are relayed to the Wi-Fi module via the dedicated SDIO interface.