Technical Manual
Table Of Contents
- Vocoder and Controller Boards Detailed Theory of Operation
- Introduction to This Section
- General
- Vocoder Board
- Controller Board
- Switching Regulator
- RX Signal Path
- TX Signal Path
- Controller Bootstrap and Asynchronous Buses
- Vocoder Bootstrap
- SPI Bus Interface
- Universal Connector and Option Selects
- Keypad and Display Module
- Controls and Control Top Flex
- Controller Memory Map
- Vocoder Memory Map
- MCU System Clock
- DSP System Clock
- Radio Power-Up/ Power-Down Sequence
- Notes
- Secure Modules
- Disassembly/Reassembly Procedures
- Troubleshooting Procedures
- Troubleshooting Charts
- Troubleshooting Waveforms
- Troubleshooting Diagrams
6-16
In bootstrap mode, the memory map is slightly different. Internal
EEPROM is mapped at $FE00-$FFFF and F1 internal SRAM starts at
$0000-$03FF. In addition, a special bootstrap ROM appears in the
ROM space from $B600-$BFFF. For additional information on
bootstrap mode, refer to the section “Controller Bootstrap and
Asynchronous Buses” on page 10.
$1060
$1500
$1600
HOST PORT
$0000
$1800
$3fff
Ext RAM
$1000
$1400
F1
INT RAM
F1 REGS
**
$0000
$1000
$2000
$3000
$4000
$5000
$6000
$7000
$8000
$9000
$A000
$B000
$C000
$D000
$E000
$F000
$FFFF
MAP 2
NON-MUX 32K COMMON
Int EE
$0E00
COMMON ROM
BANKED ROM/EEPROM
CONTROLLED BY SLIC
RAM
EXTERNAL EEPROM
CONTROLLED BY F1
F1 REGISTERS
AND MEMORY:
*
SLIC III REGISTER
$1400 - $14FF
INT RAM: $1060-$13FF
INT EE: $0E00-$0FFF
REGISTERS: $1000-$105F
External
RAM
MAEPF-24346-O
*
SLIC REG
External
RAM
External
RAM
Figure 15 Controller Memory Mapping