SB4002A_Data Sheet_EN

SB4002A

Tri-State

OUTPUT

T_val

DELAY

T_val

T_on

OUTPUT

CLK

V_trise

T_off

V_Tl

V_test

OUTPUT

V_Th

V_tfall

DELAY

Figure 8-1. Output Timing Measurement Conditions

valid

V_Tl

INPUT

CLK

V_maxV_test

T_su

V_Th

T_h

V_Th

inputs

V_test

V_Tl

V_test

Figure 8-2. Input Timing Measurement Conditions

* PCI Bus timing specification is as defined in the PCI Local Bus Specification Ver 2.3.

* SB4002A satisfies the above mentioned timing specification in the aspect of PCI Bus interface.