SB4002A_Data Sheet_EN

SB4002A
50
00h~2Fh of the serial ROM are used to set the PCI Configuration Space Header. At the system
reset, the device automatically reads this part from the serial ROM and sets the Configuration
Space Header.
You can use 30h~7Fh at your own discreet. Because you can read/write data through the serial
ROM interface register in the control register, you can easily store data without seizing other
resources.
Serial ROM Address(00h) : Control Register Setting0 Byte
Selects the Base Address0 or Base Address5 in the PCI Configuration Space for the SB4002A
control register.
If the 00h data is stored in the serial ROM 00h, the SB4002A control register is allocated to the
Base Address0, and if the 01h is stored, the SB4002A control register is allocated to the Base
Address5.
Serial ROM Address(01h) : Control Register Setting1 Byte
Determines whether the SB4002A Control Registers should be allocated to the I/O Space or the
Memory Space. If the 00h data is stored in the serial ROM 00h, the SB4002A Control Register is
allocated to the I/O Space, and if the 01h is stored, the SB4002A Control Register is allocated to
the Memory Space.
Serial ROM Address(02h) : Vendor ID Low Byte
Serial ROM Address(02h) represents the bit array [7:0] of Vendor ID[15:0] of PCI Configuration
Space 00h~01h.
Serial ROM Address(03h) : Vendor ID High Byte
Serial ROM Address(03h) represents the bit array [15:8] of Vendor ID[15:0] of PCI Configuration
Space 00h~01h.
Serial ROM Address(04h) : Device ID Low Byte
Serial ROM Address(04h) represents the bit array [7:0] of Vendor ID[15:0] of PCI Configuration
Space 02h~03h.
Serial ROM Address(05h) : Device ID High Byte
Serial ROM Address(05h) represents the bit array [15:8] of Vendor ID[15:0] of PCI Configuration
Space 02h~03h.