SB4002A_Data Sheet_EN

SB4002A
48
4. Configuration Data in Serial ROM
The PCI Configuration Space Header is an important part of the PCI bus. The Header contains
information on the product and the resources, which is a unique value for each product. Because
the Header must contain unique information by product, SB4002A reads out information from the
external serial ROM. SystemBase adopts ATMEL's 1K 3-wire Serial EEPROM AT93C46 as the
external ROM. Any other ROM which is equivalent to AT93C46 can be used.
The following table describes the address map of the serial ROM.
Address
Description
Note
0h
Control Register Setting0
Select BASE0(0) or BASE5(1)
1h
Control Register Setting1
Select I/O(0) or Memory(1)
2h
Vendor ID Low byte
3h
Vendor ID High byte
4h
Device ID Low byte
5h
Device ID High byte
6h
Status Register Capabilities List Enable
Bit4 is set to 1. Disregards other
bits.
7h
Reserved
8h
Revision ID
9h
Class Code Low byte
Ah
Class Code Middle byte
Bh
Class Code High byte
Ch
Base Address1 1st byte
Dh
Base Address1 2nd byte
Eh
Base Address1 3rd byte
Fh
Base Address1 4th byte
10h
Base Address2 1st byte
11h
Base Address2 2nd byte
12h
Base Address2 3rd byte
13h
Base Address2 4th byte
14h
Base Address3 1st byte