Manualshelf

SB4002A_Data Sheet_EN

ManualsBrandsSystemBase ManualsElectronic ComponentsPCI to Local Bus Bridge Controller - 60pcs Bundle
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SB4002A
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TRDY#
IOR#
CLK
CS#
FRAME#
DEVSEL#
EA
AD
STOP#
IRDY#
ED
Figure 3-3. Legacy Bus Delayed Read Access
3.2 Single Access/Burst Access
Single and burst access on the Legacy bus are the signal access / burst access on the PCI bus. In
other words, the single read/write on the PCI bus is transmitted to the single read/write on the
Legacy bus, and the burst read/write on the PCI bus is transmitted to the burst read/write on the
Legacy bus. For burst access, the chip select signal is asserted in the entire course of a
transaction, and the read/write signals repeat assert/deassert by a single transfer.
IOW#
IRDY#
AD
DEVSEL#
EA
CLK
CS#
ED
TRDY#
FRAME#
Figure 3-4. Legacy Bus Real Write Burst Access