SB16C1058PCI_Data Sheet_EN
SB16C1058PCI
PCI Target Interface Controller
with Octal-UART
JULY 2013 REV 1.04
37
The value of FLR is determined by FIFO mode. If FCR[7:6] is 00b, 01, 10 , and 11b,
FUR is 8, 16, 56, and 60, respectively. And if FCR[5:4] is 00b, 01b, 10b, and 11b, FLR is
0, 8, 16, and 56, respectively in 64-byte FIFO. In 256-byte FIFO mode, users can input
values in FUR and FLR as they want and use them. But the value in FUR must be larger
than that of FLR. While TX software flow control is active, its status (if Xon or Xoff) can be
verified by FSR[4]. If FSR[4] is 0b, the status is Xon and if 1b, the status is Xoff. It can be
verified by FSR[4] only. And for there is no condition to generate interrupt, interrupt
doesn’t occur. It is different from that interrupt is generated by IER[5] when RX software
flow control is enabled.
Table 12–1: Software flow control options (EFR[3:0])
EFR[3]
EFR[2]
EFR[1]
EFR[0]
TX, RX software flow controls
0
0
X
X
No transmit control
1
0
X
X
Transmit Xon1/Xoff1
0
1
X
X
Transmit Xon2/Xoff2
1
1
X
X
Transmit Xon1, Xon2/Xoff1, Xoff2
X
X
0
0
No receive flow control
X
X
1
0
Receiver compares Xon1/Xoff1
X
X
0
1
Receiver compares Xon2/Xoff2
X
X
1
1
Receiver compares Xon1, Xon2/Xoff1, Xoff2
0
0
0
0
No transmit control, No receive flow control
0
0
1
0
No transmit control, Receiver compares Xon1/Xoff1
0
0
0
1
No transmit control, Receiver compares Xon2/Xoff2
0
0
1
1
No transmit control, Receiver compares Xon1, Xon2/Xoff1, Xoff2
1
0
0
0
Transmit Xon1/Xoff1, No receive flow control
1
0
1
0
Transmit Xon1/Xoff1, Receiver compares Xon1/Xoff1
1
0
0
1
Transmit Xon1/Xoff1, Receiver compares Xon2/Xoff2
1
0
1
1
Transmit Xon1/Xoff1, Receiver compares Xon1, Xon2/Xoff1, Xoff2
0
1
0
0
Transmit Xon2/Xoff2, No receive flow control
0
1
1
0
Transmit Xon2/Xoff2, Receiver compares Xon1/Xoff1
0
1
0
1
Transmit Xon2/Xoff2, Receiver compares Xon2/Xoff2
0
1
1
1
Transmit Xon2/Xoff2, Receiver compares Xon1, Xon2/Xoff1, Xoff2
1
1
0
0
Transmit Xon2/Xoff2, No receive flow control
1
1
1
0
Transmit Xon2/Xoff2, Xoff2, Receiver compares Xon1/Xoff1
1
1
0
1
Transmit Xon1, Xon2/Xoff1, Xoff2, Receiver compares Xon2/Xoff2
1
1
1
1
Transmit Xon1, Xon2/Xoff1, Xoff2, Receiver compares Xon1, Xon2/Xoff1, Xoff2
12.3.2 Receive Software Flow Control
To make Receive Software Flow Control enabled, EFR[1:0] must be set to 01b, 10b or
11b. When enabled, data in TX FIFO are determined to be transmitted or suspended by
incoming Xon/Xoff characters. If Xon character is received, it means external UART can
accept new data, and data in TX FIFO are transmitted through TXD pin. If Xoff character
is received, it means external UART can not accept more data, and data in TX FIFO are
not transmitted. But data being transmitted by that time are completely transmitted. These