SB16C1054PCI_Data Sheet_EN

SB16C1054PCI
PCI Target Interface Controller
with Quad-UART
JULY 2013 REV 1.04
50
Table 13–2: Internal Registers Description…continued
Addr.
A[2:0]
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page 3 Registers
0h
PSR
1
0
1
0
0
1
0
Page
Select
1h
ATR
RXEN#
Polarity
Select
RXEN#
Enable
TXEN
Polarity
Select
TXEN
Enable
0
0
Auto
Toggle
Mode
Bit 1
Auto
Toggle
Mode
Bit 0
2h
EFR
Auto-CTS#
Enable
Auto-RTS#
Enable
Special
Character
Detect
Enable
Enhanced
Feature
Enable
Software
Flow
Control
Bit 3
Software
Flow
Control
Bit 2
Software
Flow
Control
Bit 1
Software
Flow
Control
Bit 0
4h
XON1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
5h
XON2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
6h
XOFF1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
7h
XOFF2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page 4 Registers
1h
AFR
0
0
0
0
0
0
0
256-FIFO
Enable
2h
XRCR
0
0
0
0
0
0
Bit 1
Bit 0
4h
TTR
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
5h
RTR
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
6h
FUR
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
7h
FLR
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
13.1 Transmit Holding Register (THR, Page 0)
The transmitter section consists of the Transmit Holding Register (THR) and Transmit
Shift Register (TSR). The THR is actually a 64-byte FIFO or a 256-byte FIFO. The THR
receives data and shifts it into the TSR, where it is converted to serial data and moved
out on the TX terminal. If the FIFO is disabled, location zero of the FIFO is used to store
the byte. Characters are lost if overflow occurs.
13.2 Receive Buffer Register (RBR, Page 0)
The receiver section consists of the Receive Buffer Register (RBR) and Receive Shift
Register (RSR). The RBR is actually a 64-byte FIFO or a 256-byte FIFO. The RSR
receives serial data from external terminal. The serial data is converted to parallel data
and is transferred to the RBR. This receiver section is controlled by the line control
register. If the FIFO is disabled, location zero of the FIFO is used to store the
characters. If overflow occurs, characters are lost. The RBR also stores the error status
bits associated with each character.