SB16C1054PCI_Data Sheet_EN

SB16C1054PCI
PCI Target Interface Controller
with Quad-UART
JULY 2013 REV 1.04
3
9. Power Management ................................................................................................................................ 25
9.1 PCI Power Management ................................................................................................................ 25
9.1.1 PCI Function Power State .................................................................................................... 25
9.2 SB16C1054PCI Power Management Pins and Functions ............................................................. 26
9.2.1 SB16C1054PCI Pins for Power Management ..................................................................... 26
9.2.2 SB16C1054PCI Power Management Wakeup implementation ........................................... 27
9.2.3 3.3Vaux Presence Detection & Power Routing.................................................................... 27
10. UART I/O Space .................................................................................................................................... 28
10.1 UART I/O Address Map ................................................................................................................ 28
11. Option I/O Space .................................................................................................................................... 29
11.1 General Information Register0 – Port Number (GIR0) ................................................................. 29
11.2 General Information Register1 – Product Version (GIR1) ............................................................ 29
11.3 General Information Register2 – Sub-Product Version (GIR2) .................................................... 29
11.4 General Information Register3 – Core Version (GIR3) ................................................................ 30
11.5 Software Reset Register ............................................................................................................... 30
11.6 Device Information Register (DIR) ............................................................................................... 30
11.7 Interface Information Register0 ~ 3 (IIR0 ~ 3) .............................................................................. 30
11.8 Interrupt Mask Register (IMR) ...................................................................................................... 32
11.9 Interrupt Poll Register (IPR) ......................................................................................................... 32
11.10 PME# Signal Resource Register (PSRR) .................................................................................. 33
11.11 GPIO Output Enable Register (GOER) ...................................................................................... 33
12. UART(SB16C1050) Functional Description .......................................................................................... 35
12.1 FIFO Operation ............................................................................................................................ 35
12.2 Hardware Flow Control................................................................................................................. 35
12.2.1 Auto-RTS ............................................................................................................................ 36
12.2.2 Auto-CTS ............................................................................................................................ 37
12.3 Software Flow Control .................................................................................................................. 37
12.3.1 Transmit Software Flow Control ......................................................................................... 37
12.3.2 Receive Software Flow Control .......................................................................................... 39
12.3.3 Xon Any Function ............................................................................................................... 41
12.3.4 Xoff Re-transmit Function .................................................................................................. 41
12.4 Sleep Mode with Auto Wake-Up ................................................................................................... 42
12.5 Programmable Baud Rate Generator .......................................................................................... 43
12.6 Break and Time-out Conditions .................................................................................................... 45
13. Register Descriptions ............................................................................................................................ 46