DataSheet_SB16C1053APCI_v106

SB16C1053APCI

PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus

PCI to 2S+1P with MIO Bus Bridge

JULY 2013 REV 1.06

bit commands.

When in the forward direction, normal data is transferred when nAUTOFD is high and an 8-bit

command is transferred when nAUTOFD is low.

When in the reverse direction, normal data is transferred when BUSY is high and an 8-bit

command is transferred when BUSY is low.

13.6.4 FIFO Operation in the ECP Mode

Transfers from host to FIFO

In the forward direction, an interrupt occurs when SERVINT = 0 and there are writeIntrThreshold

or more bytes free in the FIFO. If the FIFO is empty at this time, it can be filled with a single burst

before the empty bit requires to be re-read. Alternatively, it may be filled with writeIntrThreshold

bytes.

writeIntrThreshold = (16 - <threshold>) free bytes in FIFO

The interrupt is therefore generated when SERVINT = 0 and the number of bytes in the FIFO is

less than or equal to <threshold>. For example, if the threshold = 12, the interrupt will be set

whenever there are 12 or fewer bytes of data in the FIFO.

The PINTR signal can be used with interrupt-driven systems to request the transfer. If the FIFO

is empty at this time, it can be completely filled in a single burst. Alternatively, a minimum of (16 -

<threshold>) bytes may be written to the FIFO in a single burst. This process is repeated until

the last byte is transferred into the FIFO.

Transfers from FIFO to host

In the reverse direction, an interrupt occurs when SERVINT = 0 and readIntrThreshold bytes are

available in the FIFO. If the FIFO is full at this time, it can be emptied completely in a single

burst. Alternatively, readIntrThreshold bytes may be read from the FIFO in a single burst.

readIntrThreshold = (16 - <threshold>) data bytes in FIFO

The interrupt is therefore generated when SERVINT = 0 and the number of bytes in the FIFO is

greater than or equal to (16 - <threshold>). For example, if the threshold = 12, the interrupt will

be set whenever there are 4 to 16 bytes in the FIFO.

The PINTR signal can be used with interrupt-driven systems to request the transfer. The host

must respond to the request by reading data from the FIFO. This process is repeated until the

last byte is transferred out of the FIFO. If the FIFO is full at this time, it can be completely

emptied in a single burst. Alternatively, a minimum of (16 - <threshold>) bytes can be read from

the FIFO in a single burst.

13.6.4 RLE Operation in the ECP Mode

The SB16C1053APCI is able to decompress run-length encoded (RLE) data in ECP Mode.

When an RLE byte is intercepted, the following byte is repeated the number of times specified by

the given run-length count.

The run-length count specifies the number of times the following byte is repeated. Thus a run-

length count of 15 expands the following byte to 16 bytes, while a run-length count of zero

specifies that the following byte is read once.