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DataSheet_SB16C1053APCI_v106

ManualsBrandsSystemBase ManualsElectronic ComponentsPCI to Dual UART and Single Parallel with MIO Bus Bridge Controller, 128-pin TQFP - 90pcs Bundle
71727374757677787980
SB16C1053APCI
PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus
PCI to 2S+1P with MIO Bus Bridge
JULY 2013 REV 1.06
75
12.12 Scratch Pad Register (SPR, Page 0)
This 8-bit Read/Write Register does not control the UART in anyway. It is intended as a
scratch pad register to be used by the programmer to hold data temporarily.
12.13 Transmit 9-bit Address Register (TAR, Page 0)
Address 7h is used for SPR (Scratch Pad Register) in the existent UART Core with R/W
permission. But when UART core work in 9-bit transmission mode(MDE, bit0 of MDR bit
is set to ‘1’), this register is used for sending address bye with 9
th
bit, 1.
In 9-bit transmission mode, when we write a byte to TAR(7h), 9-bit Address Byte with 9
th
bit, 1 will send. When we write a byte to TDR(0h), 9-bit Date Byte with 9
th
bit, 0 will
send.
12.14 Divisor Latches (DLL, DLM, Page 1)
Two 8-bit registers which store the 16-bit divisor for generation of the clock in baud rate
generator. DLM stores the most significant part of the divisor, and DLL stores the least
significant part of the divisor. Divisor of zero is not recommended.
Note that DLL and DLM can only be written to before sleep mode is enabled, i.e., before
IER[4] is set. Chapter 12.7 describes the details of divisor latches.
12.15 Transmit FIFO Count Register (TCR, Page 2)
TCR shows the number of characters that can be stored in TX FIFO. In 64-byte FIFO
mode, it consists of only TCR[6:0]. If the number of characters that can be stored in TX
FIFO is 0, it is shown as 0000_0000b and if 64, it is shown as 0100_0000b. In 256-byte
FIFO mode, it consists of ISR[7] + TCR[7:0]. If the number of characters that can be
stored in TX FIFO is 0, it is shown as 0_0000_0000b and if 255, it is shown as
0_1111_1111b. And in case of the maximum number 256, it is shown as 1_0000_0000b.
12.16 Receive FIFO Count Register (RCR, Page 2)
RCR shows the number of characters that is stored in RX FIFO. In 64-byte FIFO mode,
it consists of only RCR[6:0]. If the number of characters that is stored in RX FiFO is 0, it
is shown as 0000_0000b and if 64, it is shown as 0100_0000b. In 256-byte FIFO mode,
it consists of ISR[6] + RCR[7:0]. If the number of characters that is stored in RX FiFO is
0, it is shown as 0_0000_0000b and if 255, it is shown as 0_1111_1111b. And in case of
the maximum number 256, it is shown as 1_0000_0000b.