DataSheet_SB16C1053APCI_v106

SB16C1053APCI
PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus
PCI to 2S+1P with MIO Bus Bridge
JULY 2013 REV 1.06
60
The below picture is UART transmission using THR like the existing 16C550 UART.
Figure 11–8: THR & TSR of transmit part
But MDR(Multi-Drop mode Register)’s MDE(Multi-Drop mode Enable) bit is set,
SB16C1050A is worked as Multi-Drop mode, this can 9-bit serial data transmission. In
order to transmit 9-bit address, TAR(Transmit 9-bit Address Register) is active and 9-bit
serial information can be transmitted external through TSR(Transmit Shift Register) like
below picture.
When 9
th
bit can be selected following NPS(Ninth-bit Polarity Select) bit information of
MDR(Multi-Drop mode Register).
Figure 11–9: TAR & TDR of 9-bit transmit
Transmit
Holding
Register
(THR)
Data
Byte
Transmit Shift Register (TSR)
M
S
B
L
S
B
Transmit
9-bit
Address
Register
(TAR, 7h)
Data
Byte
Data
Byte
Transmit Shift Register (TSR)
MUX
M
S
B
L
S
B
Ordering Control
9
th
Bit = ‘1’
Transmit
9-bit
Data
Register
(TDR, 0h)
9
th
Bit = ‘0’