DataSheet_SB16C1053APCI_v106

SB16C1053APCI

PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus

PCI to 2S+1P with MIO Bus Bridge

JULY 2013 REV 1.06

Figure 11–7: 9-bit Communication on Multi-Drop System Network

When RS422/RS485 communication is worked, slaves check the data from the master. If

the address is same to its own address, the slave accepts following data and it is not

same to its own address, the slave doesn’t accept the data. Then, because it is not

precise when address is transmitted, a slave device should check RS422 or RS485 Bus’s

data continually.

But, if 9-bit communication is used, 9-bit data in serial data has only to ‘1’, it is recognized

for address. Data doesn’t have to be checked because the data is judged that transmitted

for its own after the address is compared to its own address. Because of this, the slave

device doesn’t have to do unnecessary comparison process. As a result, the performance

is improved because device’s overhead is reduced and the device can be used in many

ways.

SB16C1050A UART Core developed in SystemBase is supported 9-bit communication

and 3 convenience functions are offered additionally.

12.7.1 Transmit 9-bit Address Register (TAR) / Transmit 9-bit Data Register(TDR)

In SB16C1050A, By utilizing for SPR(Scratch Pad Register, 7h) that is used for program

buffer and is not effective to UART operation, 9-bit serial data is transmitted more

convenient. If SB16C1050A is operated as Multi-Drop mode, 7h is operated as not SPR

but TAR(Transmit 9-bit Address Register, 7h). As a result of this, 9-bit serial data is

transmitted conveniently. Also, THR(Transmit Holding Register, 0h) is operated as

TDR(Transmit 9-bit Data Register, 0h), it helps that 9-bit serial data is transmitted. In other

words, if Multi-Drop mode is set, TDR(0h) has only to be written byte data, it transmitted

‘0’ in 9

bit automatically and TAR(7h) has only to be written byte data, it transmitted ‘1’ in

bit automatically.