DataSheet_SB16C1053APCI_v106

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SB16C1053APCI

PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus

PCI to 2S+1P with MIO Bus Bridge

JULY 2013 REV 1.06

8.1.11 Base Address Registers

These are spaces for assigning Base Address for accessing I/O device or memory on

PCI Local Bus. There are 6 spaces Base Address Register from 0 to 5, but the Base

Address Register 5 is set as unused and reserved area.

When Base Address Register Bit[0] is 0b, the space is used as Memory space and

when 1b, it is used as I/O space. Therefore, Bit[0] of all used Base Address Register

from 0 to 4 are all set to value 1b. All of these Base Address Register spaces are used

as space for I/O.

Each Base Address Register spaces are assigned to internal UART, external UART or

Parallel Port Register for each operational mode – 1P, 1S, 2S, 2S1P, 4S and 6S mode.

Please refer ‘Table 8-6: Base Address Registers for each operational mode’ for more

detail.

Table 8–6: Base Address Registers

PORT[2:0]

100

011

000

110

111

001

MODE

2S1P

BAR0

UART0

BAR1

UART1

BAR2

Parallel0

UART2

UART2/3

BAR3

Parallel1

UART3

UART4/5

BAR4

OPTION

8.1.11.1 Base Address Register 0

SB16C1053APCI has six operating modes. In 1S, 2S, 2S1P, 4S and 6S mode.

When SB16C1053APCI is in 1S, 2S, 2S1P, 4S and 6S mode, Base Address

Register0(BAR0) automatically sets the size of the Address Space of internal 1

UART

of SB16C1053APCI. The I/O address space is 00~07h.

When SB16C1053APCI is in 1P mode, BAR0 is not used.

8.1.11.2 Base Address register 1

When SB16C1053APCI is in 2S, 2S1P, 4S and 6S mode, Base Address

Register1(BAR1) automatically sets the size of the Address Space of internal 2

UART

of SB16C1053APCI. The I/O address space is 00~07h.

When SB16C1053APCI is in 1S and 1P mode, BAR1 is not used.