DataSheet_SB16C1053APCI_v106

SB16C1053APCI
PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus
PCI to 2S+1P with MIO Bus Bridge
JULY 2013 REV 1.06
20
IDSEL
3
I
Initialization Device Select: This is used for chip selection during
configuration read and write transaction.
Table 6–1: Pin Description…continued
PCI Interfaces
Name
Pin
Type
Description
DEVSEL#
18
S/T/S
Device Select: This signal indicates that the driving device has decoded its
address as the target of the current access. As an input, DEVSEL# indicates
whether any device on the bus has been selected.
PERR#
21
S/T/S
Parity Error: This signal is only for reporting data parity errors during all PCI
transactions except Special Cycle.
SERR#
22
S/T/S
System Error: This signal is for reporting address parity errors, data parity
errors on the Special Cycle command, or any other system error where the
result will be catastrophic.
REQ#
112
O
Request: This signal indicates to the arbiter that SB16C1053APCI want to
use of the PCI bus.
GNT#
113
I
Grant: This signal indicates to the SB16C1053APCI from the arbiter that
access to the PCI bus has been granted.
Other Interfaces
Name
Pin
Type
Description
XTAL1
45
I
Crystal or External Clock Input: This clock input of serial channel.
XTAL2
46
O
Crystal or Buffed Clock Output: This output level is 3.3V.
WAKEREQ
107
I
WAKE Request: PM state of PCI Device goes from D3 state to D0 state with
the Wake Up Event. This pin receives the event signal needed for the
transition from D3 state to D0 state.
MCS3#_OSC2
54
I/O
This pin is dual mode pin. After power is supplied to the chip, the pin is set to
input mode for a while and receive OSCx[2:0] input. After that, the pin is set to
output mode and outputs MCS3# of MIO Bus
TM
in 4S and 6S mode.
Oscillator Setting 2: This pin is working in input mode for a while after power
is supplied to the chipset. In this time, oscillator setting is set and the value is
adopted to Device Information Register in option register space.
MIO Bus Chip Select 3: This output pin is a chip select signal of MIO Bus
TM
for the 4
th
external UART channel.
MCS2#_PORT1
55
I/O
This pin is dual mode pin. After power is supplied to the chip, the pin is set to
input mode for a while and receive PORTx[2:0] input. After that, the pin is set
to MCS2#(output) of MIO Bus
TM
in 4S and 6S mode.
MIO Bus Chip Select 1: This output pin is a chip select signal of MIO Bus
TM
for the 2
rnd
xternal UART channel.
Port Setting 1: This input pin is a port setting for various operating modes.