SB16C1052PCI_Data Sheet_EN

SB16C1052PCI
PCI Target Interface Controller
with Dual UART
JULY 2013 REV 1.06
32
11.8 Interrupt Mask Register (IMR)
IMR enables or disables interrupt of Serial 1, 2-port mode.
Table 11–6: Interrupt Mask Register Description
Bit
Symbol
Description
7
IMR[7]
Not used.
6
IMR[6]
Not used.
5
IMR[5]
Not used.
4
IMR[4]
Not used.
3
IMR[3]
Not used.
2
IMR[2]
Not used.
1
IMR[1]
0b: Disables Port2 interrupt on Serial 2-port mode, and Serial 2-port ALL mode.
1b: Enables Port2 interrupt on Serial 2-port mode, and Serial 2-port ALL mode.
0
IMR[0]
0b: Disables Port1 interrupt on Serial 1-port mode, Serial 2-port mode, Serial 1-port ALL
mode, and Serial 2-port ALL mode.
1b: Enables Port1 interrupt on Serial 1-port mode, Serial 2-port mode, Serial 1-port ALL
mode, and Serial 2-port ALL mode.
11.9 Interrupt Poll Register (IPR)
IPR indicates interrupt generation state of Port 1 ~ Port 2.
Table 11–7: Interrupt Poll Register Description
Bit
Symbol
Description
7
IPR[7]
Not used.
6
IPR[6]
Not used.
5
IPR[5]
Not used.
4
IPR[4]
Not used.
3
IPR[3]
Not used.
2
IPR[2]
Not used.
1
IPR[1]
0b: Port2 interrupt has occurred in Serial 2-port mode, and Serial 2-port ALL mode.
1b: Port2 interrupt has not occurred in Serial 2-port mode, and Serial 2-port ALL mode.
0
IPR[0]
0b: Port1 interrupt has occurred in Serial 1-port mode, Serial 2-port mode, Serial 1-port
ALL mode, and Serial 2-port ALL mode.
1b: Port1 interrupt has not occurred in Serial 1-port mode, Serial 2-port mode, Serial 1-
port ALL mode, and Serial 2-port ALL mode.