SB16C1052PCI_Data Sheet_EN

SB16C1052PCI
PCI Target Interface Controller
with Dual UART
JULY 2013 REV 1.06
3
8.2.2 Pointer to Next Capability (41h).................................................................................... 23
8.2.3 Power Management Capabilities (42~43h) .................................................................... 23
8.2.4 Power Management Control/Status Register (44~45h) ................................................... 24
9. Power Management ....................................................................................................................... 25
9.1 PCI Power Management ........................................................................................................ 25
9.1.1 PCI Function Power State ............................................................................................. 25
9.2 SB16C1052PCI Power Management Pins and Functions ........................................................... 26
9.2.1 SB16C1052PCI Pins for Power Management .................................................................. 26
9.2.2 SB16C1052PCI Power Management Wakeup implementation ......................................... 26
9.2.3 3.3Vaux Presence Detection & Power Routing ............................................................... 27
10. UART I/O Space .......................................................................................................................... 28
10.1 UART I/O Address Map ........................................................................................................ 28
11. Option I/O Space ......................................................................................................................... 29
11.1 General Information Register0 – Port Number (GIR0) ............................................................ 29
11.2 General Information Register1 – Product Version (GIR1) ....................................................... 30
11.3 General Information Register2 – Sub-Product Version (GIR2) ................................................. 30
11.4 General Information Register3 – Core Version (GIR3) ............................................................ 30
11.5 Software Reset Register ...................................................................................................... 30
11.6 Device Information Register (DIR) ....................................................................................... 30
11.7 Interface Information Register0 ~ 1 (IIR0 ~ 1) ..................................................................... 31
11.8 Interrupt Mask Register (IMR) ............................................................................................. 32
11.9 Interrupt Poll Register (IPR) ................................................................................................ 32
11.10 PME# Signal Resource Register (PSRR) .............................................................................. 33
11.10 GPIO Output Enable Register (GOER) ................................................................................. 34
12. UART(SB16C1050) Functional Description ..................................................................................... 36
12.1 FIFO Operation ................................................................................................................... 36
12.2 Hardware Flow Control ........................................................................................................ 36
12.2.1 Auto-RTS .................................................................................................................. 37
12.2.2 Auto-CTS .................................................................................................................. 38
12.3 Software Flow Control ......................................................................................................... 39
12.3.1 Transmit Software Flow Control .................................................................................. 40
12.3.2 Receive Software Flow Control ................................................................................... 40
12.3.3 Xon Any Function ...................................................................................................... 43
12.3.4 Xoff Re-transmit Function ........................................................................................... 43
12.4 Sleep Mode with Auto Wake-Up ........................................................................................... 44