Product Info

8
4. Hardware Design
4.1 Pin Definition
Pin NO.
Pin Name
Type
Description
1
DVSS
GND
Digital LDO ground
2
SPI_CN/I2S_LR/PWM3/PD<2>
Digital I/O
SPI chip select (Active low) / I2S left right channel
select / PWM3 output / GPIO PD[2]
3
PWM1_N/I2S_SDI/7816_TRX(UART_TX)/PD<
3>
Digital I/O
PWM1 inverting output / I2S serial data input / UART
7816 TRX(UART_TX) / GPIO PD[3]
4
SWM/I2S_SDO/PWM2_N/PD<4>
Digital I/O
Single wire master / I2S serial data output / PWM2
inverting output / GPIO PD[4]
5
SPI_CK/I2S_BCK/7816_TRX(UART_TX)/
PD<7>
Digital I/O
SPI clock(I2C_SCK) / I2S bit clock / UART 7816
TRX(UART_tx) / GPIIO PD[7]
6
DMIC_DI/PWM0_N/UART_RX/PA<0>
Digital I/O
DMIC data input / PWM0 inverting output / UART_RX
/ GPIO PA[0]
7
PWM4/UART_TX/Ic_copmp_ain<1>/
sar_aio<1>/PB<1>
Digital I/O
PWM4 output / UART_TX / Low power comparator
input / SAR ADC input / GPIO PB[1]
8
DVSS
GND
Digital LDO ground
9
SWS/UART_RTS/PA<7>
Digital I/O
Single wire slave/ UART_RTS / GPIO PA[7]
10
VDD_IO
PWR
External 3.3V power supply input for IO
11
SDM_P0/PWM4/lc_comp_ain<4>/
sar_aio<4>/PB<4>
Digital I/O
SDM positive output 0 / PWM4 output / Low power
comparator input / SAR ADC input / GPIO PB[4]
12
SDM_N0/PWM5/lc_comp_ain<5>/
sar_aio<5>/PB<5>
Digital I/O
SDM negative output 0 / PWM5 output / Low power
comparator input / SAR ADC input / GPIO PB[5]
13
SDM_P1/SPI_DI/UART_RTS/
lc_comp_ain<6>/sar_aio<6>/
PB<6>
Digital I/O
SDM positive output 1 / SPI data input (I2C_SDA) /
UART_RTS / Low power comparator input / SAR ADC
input / GPIO PB[6]
14
SDM_N1/SPI_DO/UART_RX/
lc_comp_ain<7>/sar_aio<7>/
PB<7>
Digital I/O
SDM negative output 1 / SPI data output / UART_RX /
Low power comparator input / SAR ADC input / GPIO
PB[7]
15
I2C_SDA/PWM4_N/UART_RTS/
PGA_P0/PC<0>
Digital I/O
I2C serial data / PWM4 inverting output / UART_RTS /
PGA left channel positive input / GPIO PC[0]
16
I2C_SCK/PWM1_N/PWM0/
PGA_N0/PC<1>
Digital I/O
I2C serial clock / PWM1 inverting output / PWM0
output / PGA left channel negative input / GPIO PC[1]
17
PWM0/7816_TRX(UART_TX)/I2C_SDA/XC32K
_O/PGA_P1/PC<2>
Digital I/O
PWM0 output / UART 7816 TRX (UART_TX) / I2C serial
data / (optional) 32kHz crystal output / PGA right
channel positive input / GPIO PC[2]
18
PWM1/UART_RX/I2C_SCK/XC32K_
I/PGA_N1/PC<3>
Digital I/O
PWM1 output / UART_RX / I2C serial clock / (optional)
32kHz crystal input / PGA right channel negative input
/ GPIO PC[3]
19
PWM2/UART_CTS/PWM0_N/
sar_aio<8>/PC<4>
Digital I/O
PWM2 output / UART_CTS / PWM0 inverting output /
SAR ADC input / GPIO PC[4]
20
DVSS
GND
Digital LDO ground
Table 9: Pin Definition