Datasheet

Chapter 2: Installation
2-25
®
S
UPER X7DBR-8/i
Fan1
8-pin PWR
FP Ctrl
IDE1
Floppy
SATA1
SATA0
USB2/3
SMB
Battery
North Bridge
20-pin ATX Main PWR
JPG1
SCSI
CTRLR
CPU1
South
Bridge
JAR
PWR
SMB
Fan2
Compact Flash
JCF1
JWF1
JL1
PCI-X 100MHz
USB4/5
WOL
DA1
DIMM 4A
DIMM 4B
KB
MS
USB0/1
COM1
GLAN2
GLAN1
JI
2
C1
E2x8
SXB-
VGA
SCSI Chann. B
JWD
SATA3
SATA2
SATA5
SATA4
Fan5
Fan4
Fan3
4-pin
PWR
3rd PWR
Fail
Buzzer
JPWF
Bank4
Bank3
E3x8
SXB-
JPL1
JPL2
JPA1
LVD/SE
U320
WOR
Chan A
U320 SCSI
JBT1
GLAN
CTRLR
VGA
CTRLR
BIOS
DA2
DIMM 3A
DIMM 3B
DIMM 2A
DIMM 2B
Bank2
Bank1
DIMM 1A
DIMM 1B
CPU2
SIMSO
COM2
PCI-X 100MHz ZCR SXB- E2x8
JI
2
C2
PWLED SPK
LE1
JOH1
J7
DA7
SGPIO1
SGPIO2
S I/O
JPA2
JPA3
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact
pads to prevent the accidental clearing of CMOS. To clear CMOS, use a metal
object such as a small screwdriver to touch both pads at the same time to short
the connection. Always remove the AC power cord from the system before clear-
ing CMOS. Note: For an ATX power supply, you must completely shut down the
system, remove the AC power cord and then short JBT1 to clear CMOS.
A
B
A. Clear CMOS
B. Watch Dog Enable
Watch Dog Enable/Disable
JWD controls the Watch Dog function, a system
monitor that takes action when a software ap-
plication freezes the system. Close Pins 1-2 to
reset the system if an application hangs. Close
Pins 2-3 to generate a non-maskable interrupt
signal for the application that hangs. See the ta-
ble on the right for jumper settings. Watch Dog
must also be enabled in the BIOS.
Note: When enabled, the user needs to write his
or her own application software in order to dis-
able the Watch Dog Timer.
Watch Dog
Jumper Settings (JWD)
Jumper Setting Defi nition
Pins 1-2 Reset
(*default)
Pins 2-3 NMI
Open Disabled