PDSLA PDSLE USER’S MANUAL Revision 1.
The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our web site at www.supermicro.com.
Preface Preface About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the PDSLA/PDSLE motherboard. The PDSLA/PDSLE supports single Intel Pentium® D/Pentium® 4/Celeron Processor in the 775-Land Grid Array Package at a system bus speed of 1066/800/533 MHz.
PDSLA/PDSLE User’s Manual Table of Contents Preface About This Manual ...................................................................................................... iii Manual Organization ................................................................................................... iii Chapter 1: Introduction 1-1 Overview ......................................................................................................... 1-1 Checklist ...................................................
Table of Contents FP Audio .................................................................................................. 2-13 Ethernet Port ............................................................................................ 2-13 Fan Headers............................................................................................. 2-14 Chassis Intrusion ...................................................................................... 2-14 ATX PS/2 Keyboard/Mouse Ports ...................
PDSLA/PDSLE User’s Manual Chapter 4: BIOS 4-1 Introduction ....................................................................................................... 4-1 4-2 Running Setup ................................................................................................. 4-2 4-3 Main BIOS Setup ............................................................................................. 4-2 Main BIOS Setup Menu ...........................................................................
Chapter 1: Introduction Chapter 1 Introduction 1-1 Overview Checklist Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Please check that the following items have all been included with your motherboard. If anything listed here is damaged or missing, contact your retailer.
PDSLA/PDSLE User’s Manual Contacting Supermicro Headquarters Address: SuperMicro Computer, Inc. 980 Rock Ave. Tel: San Jose, CA 95131 U.S.A. +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) Web Site: support@supermicro.com (Technical Support) www.supermicro.com Europe Address: Tel: Fax: Email: SuperMicro Computer B.V. Het Sterrenbeeld 28, 5215 ML 's-Hertogenbosch, The Netherlands +31 (0) 73-6400390 +31 (0) 73-6416525 sales@supermicro.
Chapter 1: Introduction Figure 1-1. PDSLA/PDSLE Image An Important Note to the User • All images and layouts shown in this manual are based upon the latest PCB Revision available at the time of publishing of this manual. The motherboard you've received may or may not look exactly the same as the ones shown in this manual.
PDSLA/PDSLE User’s Manual Figure 1-3.
Chapter 1: Introduction PDSLA/PDSLE Quick Reference Jumpers Description Default Setting J9 Buzzer/Speaker Enable Pins 3-4 (Enabled) JBT1 CMOS Clear (*See Chapter 2) JFSB1/JFSB2 CPU Frequency Pins 1-2/Pins 1-2 (Auto) JP1/JP2 JPL1 PCI/PCI-E SMB Giga-bit LAN Enable Open/Open (Disabled) Pins 1-2 (Enabled) JPUSB1 B/P USB Wake Up Pins 2-3 (Disabled) JPUSB2 F/P USB Wake Up Pins 2-3 (Disabled) JWD Watch Dog Pins 1-2 (Reset) Connectors Description ATX PWR (J40) ATX 24-Pin Power Connector 4-P
PDSLA/PDSLE User’s Manual VRM 10.1 VRM V10.1 LGA775_PROCESSOR DATA CTRL INTEGRATED ADDR FSB: 1066/800/533MHz DIMM_CHA LAKEPORT GRAPHIC (945G only) 1 PCIE_x16 CK410 CLK PCIE_x16 GRAPHIC DDR2_667/533/400 DIMM_CHB 945G/P DMI PRI_IDE 4 x SATA PORTS PCIE_x1 UDMA/100 PCIE_x1 ICH-7 S-ATA/300 PCI_32_BUS 82573 LAN 1_PCIE_x1 SLOTS 1_PCIE_x8 SLOTS 4_PCI_x32 SLOTS USB 2.0/1.1 AC97 LPC USB LPC PORT_0~7 W83627HG LPC I/O KB. MS. FDD. SER.1 SER.2 5.1-CH AUDIO PRN. Figure 1-3.
Chapter 1: Introduction Motherboard Features CPU Latest CPU technology! • Single Intel Pentium® D/Pentium® 4/Celeron Dual Core in the 775-Land Grid Array Package at a system bus speed of 1066/800/533 MHz. • Supports Intel Hyper-Threading Technology. Memory Latest memory technology! • Supports unbuffered, non-ECC single or dual channel DDR2 with the bandwidth up to 5.3GB/s (DDR2 667) for single channel mode and 10.7 GB/s (DDR2 667) in dual-channel Interleaved mode. Note: See Section 2-4 for details.
PDSLA/PDSLE User’s Manual ACPI Features • Microsoft OnNow • Slow blinking LED for suspend state indicator • BIOS support for USB keyboard • Main switch override mechanism • Internal/external modem ring-on Onboard I/O • 1 ATA/100 EIDE Channels for a total of two IDE devices backward compatible • Built in ICH7 SATA Controller, 4 connectors for 4 devices (300MB/S) • 1 floppy port interface (up to 2.
Chapter 1: Introduction 1-2 Chipset Overview Intel’s Lakeport (945G/P) chipset consists of two primary components: the Graphics Memory Controller Hub (GMCH)/Memory Controller Hub (MCH) and the I/O Controller Hub (ICH7). Optimized for the Celeron, Pentium 4, Pentium D processors in an LGA775 Package, the Lakeport (945G/P) provides the performance and feature-set required for high-end UP dual core processor desktop solutions.
PDSLA/PDSLE User’s Manual 1-3 PC Health Monitoring This section describes the PC health monitoring features of the PDSLA/PDSLE. The motherboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for the CPU Core, Chipset Core +1.5V, +3.3V, +3.3V standby, +5V, +5V Standby, Vbat and ±12V The onboard voltage monitor will scan these voltages continuously. Once a voltage becomes unstable, it will give a warning or send an error message to the screen.
Chapter 1: Introduction 1-4 Power Configuration Settings This section describes features of your motherboard that deal with power and power settings. Slow Blinking LED for Suspend-State Indicator When the CPU goes into a suspend state, the chassis power LED will start blinking to indicate that the CPU is in suspend mode. When the user presses any key, the CPU will wake-up and the LED will automatically stop blinking and remain on.
PDSLA/PDSLE User’s Manual 1-5 Power Supply As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates of 1 GHz and faster. The PDSLA/PDSLE accommodates 12V ATX power supplies. Although most power supplies generally meet the specifications required by the CPU, some are inadequate. A 2-Amp of current supply on a 5V Standby rail is strongly recommended.
Chapter 1: Introduction 1-6 Super I/O The disk drive adapter functions of the Super I/O chip include a floppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock generator, drive interface control logic and interrupt and DMA logic. The wide range of functions integrated onto the Super I/O greatly reduces the number of components required for interfacing with floppy disk drives.
PDSLA/PDSLE User’s Manual Notes 1-14
Chapter 2: Installation Chapter 2 Installation 2-1 Static-Sensitive Devices Electric Static Discharge (ESD) can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD. Precautions • Use a grounded wrist strap designed to prevent static discharge. • Touch a grounded metal object before removing the board from the antistatic bag.
PDSLA/PDSLE User's Manual 2-2 Processor and Heatsink Installation When handling the processor package, avoid placing ! direct pressure on the label area of the fan. (*Note: The CPU heatsink is included in Intel's CPU retail package.) Installation of the LGA775 Processor IMPORTANT: Always connect the power cord last and always remove it before adding, removing or changing any hardware components. Make sure that you install the processor into the CPU socket before you install the CPU heatsink.
Chapter 2: Installation North Key 3. Locate Pin 1 on the CPU socket. (*Note: Pin 1 is the corner marked with a triangle). Please note that the North Key and the South Key are located vertically in the CPU housing. Pin 1 4. Position the motherboard in such a way that Pin 1 of the CPU socket is located at the left bottom of the CPU housing. South Key North Center Edge 5. Use your thumb and your index finger to hold the CPU at the North Center Edge and the South Center Edge of the CPU. 6.
PDSLA/PDSLE User's Manual Installation of the Heatsink 1. Locate the CPU Fan on the mother- board. (Refer to the layout on Page 1-4 for the CPU Fan location.) 2. Position the heatsink in such a way that the heatsink fan wires are closest to the CPU fan and are not interfered with other components 3. Inspect the CPU Fan wires to make sure that the wires are routed through the bottom of the heatsink. 4. Remove the thin layer of the protective film from the copper core of the heatsink.
Chapter 2: Installation 8. Repeat Step 6 to insert all four heatsink fasteners into the mounting holes. 9. Once all four fasteners are securely inserted into the mounting holes and the heatsink is properly installed on the motherboard, connect the heatsink fan wires to the CPU Fan connector. Heatsink Removal 1. Unplug the power cord from the power supply. 2. Disconnect the heatsink fan wires from the CPU fan header. 3.
PDSLA/PDSLE User's Manual 2-4 Installing DDR2 Memory CAUTION Exercise extreme care when installing or removing memory modules to prevent any possible damage. Memory Module Installation (See Figure 2-2) 1. Insert each DDR2 memory module vertically into its slot. Pay attention to the notch along the bottom of the module to prevent inserting the module incorrectly. (See support information below.) 2. Gently press down on the memory module until it snaps into place.
Chapter 2: Installation Figure 2-2. Side and Top Views of DDR2 Module Installation into Slot 2 To Install: Insert module vertically and press down until it snaps into place. Pay attention to the notch. To Remove: Use your thumbs gently to push each release tab outward to release the DIMM from the slot. 2-5 I/O Port/Control Panel Connector Locations The I/O ports are color coded in conformance with the PC99 specification to make setting up your system easier.
PDSLA/PDSLE User's Manual 2-6 Connecting Cables ATX Power Supply 24-pin Connector Pin Definitions (J20) Pin Number Definition Pin Number Definition 1 +3.3V 13 +3.3V 2 +3.3V 14 -12V 3 COM 15 COM 4 +5V 16 PS_ON# 5 COM 17 COM 6 +5V 18 COM 7 COM 19 COM 8 PWR_OK 20 Res(NC) 9 5VSB 21 +5V 10 +12V 22 +5V 11 +12V 23 +5V 12 +3.3V 24 COM Power Supply Connectors The primary power supply connector(J40) on the PDSLA/PDSLE meets the SSI (Superset ATX) 24-pin specification.
Chapter 2: Installation PW_ON Connector PW_ON Pin Definitions (JF1) The PW_ON connector is located on pins 1 and 2 of JF1. Connect it to the chassis power button, which you may also configure to put the system into Pin # 1 2 Definition Signal GND suspend mode (see the Power Button Mode setting in BIOS). To turn off the power when the suspend mode is enabled, press the power button for at least 4 seconds. See the table on the right for pin definitions.
PDSLA/PDSLE User's Manual Overheat/FanFail LED Overheat (OH)/ Fan_Fail LED Pin Definitions (JF1) Connect an LED to the OH/Fan Fail connection on pins 7 and 8 of JF1 to provide advanced warning of chassis overheating or system fan failure. Pin # Definition 7 LED_Anode 8 OH/Fan Fail LED Sig. Refer to the table on the right for pin definitions.
Chapter 2: Installation HDD LED The HDD LED connection is located on pins 13 and 14 of JF1. Attach the HDD LED Pin Definitions (JF1) hard drive LED cable here to display disk activity (for any hard drives on Pin Number Definition 13 LED_Anode HD Active 14 the system, including SCSI, Serial ATA and IDE). See the table on the right for pin definitions. Power_LED Connector PWR_LED Pin Definitions (JF1) Pin Number Definition 15 LED_Anode 16 PWR LED Sig.
PDSLA/PDSLE User's Manual Serial Ports Serial Port Pin Definitions (COM1) Two serial ports are included on the Pin Number Definition Pin Number Definition 1 CD 6 DSR 2 RD 7 RTS 3 TD 8 CTS 4 DTR 9 RI 5 Ground motherboard. COM1(J31) is a port located beside the mouse/keyboard ports and COM2(J13) is a header located on the motherboard near PCI-E slot #6. See the table on the right for Serial Port Pin Definitions (COM2) pin definitions.
Chapter 2: Installation FP Audio When front panel headphones are plugged in, the back panel audio output is disabled. This is done through the FP Audio header (J12). If the front panel interface card is not connected to the front panel audio header, jumpers should be installed on the header (J12) pin pairs: 1-2, 5-6, and 9-10.
PDSLA/PDSLE User's Manual Fan Headers There are three fan headers (Fan Fan Header Pin Definitions (CPU, Chassis and Overheat) 1, Fan 2 and Fan3) on the PDSLA/ Definition Ground (black) +12V (red) Tachometer PWM_Control Pin# 1 2 3 4 PDSLE. (See the table on the right for pin definitions.) These are 4-pin fan headers; however, the traditional Caution: These fan headers use DC power. 3-wire fans are also supported. (Pins #1-#3 of the fan headers are backward compatible with the traditional 3pin fans.
Chapter 2: Installation ATX PS/2 Keyboard and PS/2 Mouse Ports PS/2 Keyboard and Mouse Port Pin Definitions (J28) The ATX PS/2 keyboard and the PS/2 mouse are located at J28. See the Pin Number Definition 1 Data 2 NC 3 Ground 4 VCC 5 Clock 6 NC table on the right for pin definitions. (The mouse port is above the keyboard port. See the table on the right for pin definitions.
PDSLA/PDSLE User's Manual Wake-On-Ring The Wake-On-Ring header is located Wake-On-Ring Pin Definitions at JWOR. This function allows your Pin Number 1 2 computer to be awakened by an incoming call the modem when in Definition Ground Wake-up suspend state. See the table on the right for pin definitions. You must also have a WOR card and cable to use WOR. Wake-On-LAN The Wake-On-LAN header is designated WOL on the motherboard. See the table on the right for pin definitions.
Chapter 2: Installation VGA Connector (*For PDSLA only) A VGA connector (JG1) is located next to the COM1 on the IO backplane. Refer to the board layout below for the location. AC'97 Output AC'97 provides high qua lity onboard Blue: Line In(surround L/R) audio. The PDSLA/PDSLE features 6channel sound for front L&R, rear L&R, center and subwoofer speakers. This feature is activated with the Advanced software (on the CD-ROM included with your motherboard).
PDSLA/PDSLE User's Manual 2-7 Jumper Settings Explanation of Jumpers To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the motherboard layout pages for jumper locations.
Chapter 2: Installation USB Wake-Up Use JPUSB jumpers to enable the function of "System Wake-Up via USB USB Wake-Up Jumper Settings (JPUSB1/JPUSB2) Jumper devices", which allows you to "wakeup" the system by pressing a key Position 1-2 2-3 on the USB keyboard or by clicking the USB mouse of your system. The Definition Enabled *Disabled (*Default) JPUSB jumpers are used together with the USB Wake-Up function in the BIOS.
PDSLA/PDSLE User's Manual Watch Dog Enable/Disable JP5 enables the Watch Dog func- Watch Dog Jumper Settings tion. Watch Dog is a system monitor Jumper Position Pins 1-2 Pins 2-3 Open that can reboot the system when a software application hangs. Pins 1-2 will cause WD to reset the system if an application hangs. Definition WD to Reset WD to NMI Disabled Pins 2-3 will generate a non-maskable interrupt signal for the application that hangs. See the table on the right for jumper settings.
Chapter 2: Installation SMBus to PCI/PCI-Exp. Slots SMBus to PCI/PCI-Exp Jumpers JP1, JP2 allow you to conJumper nect PCI/PCI-E slots to the System Management Bus. The default setting Position closed *Open is "Open" to disable the connection. Definition Enabled Disabled (*Default) See the table on the right for jumper settings. Speaker Connector Speaker Connector The speaker connector is located at Close: Pins 3 &4 Internal Buzzer connect w/a External 4-pin header Speaker J9.
PDSLA/PDSLE User's Manual CPU Front Side Bus Speed Front Side Bus Speeds: JFSB1, JFSB2 JFSB1 and JFSB2 allow you to set the JFSB1 1-2 2-3 2-3 Open Open Front Side Bus Frequency. See the table on the right for pin definitions. (*Default is Auto.
Chapter 2: Installation 2-8 Onboard Indicators Yellow LED LED1 LED2 GLAN LEDs Back View The Gigabit Ethernet LAN ports (located beside the Video port) has two LEDs. The yellow LED indicates activity while the other LED may be green, amber or off to indicate 1 Gb LAN Left LED Indicator (Speed LED) LED Color Off Green Amber the speed of the connection. See the table at right for the functions associated with the second LED.
PDSLA/PDSLE User's Manual 2-9 Parallel Port, Floppy Drive, and Hard Drive Connections Use the following information to connect the floppy and hard disk drive cables. • The floppy disk drive cable has seven twisted wires. • A red mark on a wire typically designates the location of pin 1. • A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives.
Chapter 2: Installation Floppy Connector The floppy connector is located at J27. Refer to Figure 2-3 for location. See the table on the right for pin definitions. IDE Connector IDE Connector Pin Definitions (J3) There are no jumpers to configure the onboard IDE interfaces Pins 3, 5 of JF1. Refer to Figure 2-3 for location. See the table on the left for pin definitions. N o t e : Yo u must use the ATA100/66 cable included with your system to benefit from the ATA100/66 technology.
PDSLA/PDSLE User's Manual 2-10 Installing the Operating System and Software Programs After all the hardware has been installed, you must first install the operating system, and then, other software drivers. The necessary drivers are all included on the Supermicro CDs that came packaged with your motherboard. Drivers/Tool Installation Display Screen *Note: Click the icons showing a hand writing on the paper to view the readme files for each item.
Chapter 2: Installation Introduction to Serial ATA (SATA) Serial ATA(SATA) is a physical storage interface. It uses a single cable with a minimum of four wires to create a point-to-point connection between devices. It is a serial link which supports SATA Transfer rates from 150MBps. The second generation SATA can support up to 300 MBps theoretically.
PDSLA/PDSLE User's Manual Supero Doctor III The Supero Doctor III program is a Web based management tool that supports remote management capability. It includes Remote and Local Management tools. The local management is called SD III Client. The Supero Doctor III program included on the CDROM that came with your motherboard allows you to monitor the environment and operations of your system. Supero Doctor III displays crucial system information such as CPU temperature, system voltages and fan status.
Chapter 2: Installation Supero Doctor III Interface Display Screen-II (Remote Control) *Note: SD III Software Revision 1.0 can be downloaded from our Website at: ftp:// ftp.supermicro.com/utility/Supero_Doctor_III/. You can also download SDIII User's Guide at: http://www.supermicro.com/PRODUCT/Manuals/SDIII/UserGuide.pdf. For Linux, we will still recommend Supero Doctor II.
PDSLA/PDSLE User's Manual Notes 2-30
Chapter 3: Troubleshooting Chapter 3 Troubleshooting 3-1 Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any hardware components. Before Power On 1.
PDSLA/PDSLE User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure that the DIMM modules are properly and fully installed. 2. You should be using unbuffered DDRII memory (see next page). Also, it is recommended that you use the same memory speed for all DIMMs in the system. See Section 2-4 for memory limitations. 3.
Chapter 3: Troubleshooting 3. If you still cannot resolve the problem, include the following information when contacting Super Micro for technical support: • Motherboard model and PCB revision number • BIOS release date/version (this can be seen on the initial display when your system first boots up) •System configuration An example of a Technical Support form is on our web site at (http://www.supermicro.com/support/contact.cfm). 4.
PDSLA/PDSLE User's Manual instant off capabilities as long as the BIOS has control of the system. When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count (the first screen that appears when the system is turned on), the momentary on/off switch must be held for more than four seconds to shut down the system. This feature is required to implement the ACPI features on the motherboard.
Chapter 3: Troubleshooting 3-4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and mailed prepaid or hand-carried.
PDSLA/PDSLE User's Manual Note 3-6
Chapter 4: BIOS Chapter 4 BIOS 4-1 Introduction This chapter describes the AwardBIOS for the PDSLA/PDSLE. The Award ROM BIOS is stored in a Flash chip and can be easily upgraded using a floppy diskbased program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Refer to the Manual Download area of our web site for any changes to BIOS not reflected in this manual.
PDSLA/PDSLE User's Manual 4-2 Running Setup *Optimal default settings are in bold text unless otherwise noted. The BIOS setup options described in this section are selected by choosing the appropriate text from the Main BIOS Setup screen. All displayed text is described in this section, although the screen display is often all you need to understand how to set options (see the note on the next page). When you first power on the computer, the AwardBIOS™ is immediately activated.
Chapter 4: BIOS Main BIOS Setup Menu Date/Time Set the system date and time. Key in the correct information in the mm, dd and yy fields. Press the Enter key to save the data. Legacy Diskette A This setting allows the user to set the type of floppy disk drive installed as diskette A. The options are None, 360Kb 5.25 in, 1.2MB 5.25 in, 720Kb 3.5 in, 1.44MB, 3.5 in and 2.88MB 3.5 in. Legacy Diskette B This setting allows the user to set the type of floppy disk drive installed as diskette B.
PDSLA/PDSLE User's Manual IDE HDD Auto-Detection This option allows the BIOS to automatically display the configuration settings for the IDE devices. Press "Enter" to see the setting displayed by the BIOS.
Chapter 4: BIOS Base Memory/Extended Memory/Total Memory These are displays that inform you how much of each type of memory is recognized as being present in the system. 4-4 Advanced BIOS Setup Choose Advanced BIOS Setup from the Award BIOS main menu with the Left/Right arrow keys. You should see the following display. Select one of the items in the left frame of the screen to go to the sub screen for that item. Advanced BIOS Setup options are displayed by highlighting the option using the arrow keys.
PDSLA/PDSLE User's Manual ACPI Function Select Enabled to activate the function of BIOS Support for the Advanced Configuration and Power Interface features. The settings are Enabled or Disabled. ACPI Suspend Type If enabled, the option allows the user to determine the ACPI Suspend type. The options are S1(POS), S3(STR), S1&S3. APIC Mode This setting allows you to Enable or Disable APIC.
Chapter 4: BIOS On-Chip Serial ATA Select Disabled to disable the SATA Controller. Select Auto to allow the BIOS to make arrangements automatically. Select Combined Mode to use the PATA and SATA Combined Mode. The maximum of 2 IDE drives in each channel is allowed. Select Enhanced Mode to enable both SATA and PATA. This mode will support up to 6 IDE drives. Select SATA Only to allow SATA to operate in the Legacy Mode . USB Controller This setting allows you to enable or disable the USB Controller.
PDSLA/PDSLE User's Manual 4-4.3 I/O Device Configuration Onboard FDC This setting allows the user to enable the onboard FDC controller. The options are Enabled and Disabled. Onboard Serial Port1/Onboard Serial Port2 This setting allows the user to set the address and the corresponding IRQ for the Serial Port1 and Serial Port 2. The options are Disabled, 3F8/IRQ4, 2F8/IRQ3, 3E8/IRQ4, 2E8/IRQ3, and Auto. The default setting for Serial Port1 is 3F8/IRQ4 and the default for Port 2 is 2F8/IRQ3.
Chapter 4: BIOS EPP Mode Select This setting allows the user to select the EPP port type. The options are EPP 1.9 and EPP 1.7. ECP Mode Use DMA This setting allows the user to select the DMA channel for the ECP mode (port) to use. The options are 1 and 3. PWRON After PWR-Fail This setting allows the user to specify how the system will respond when power is reapplied after the system has gone down due to a power failure. The options are Off, On and Former-Sts.
PDSLA/PDSLE User's Manual 4-4.4 PnP/PCI Configuration Choose PCI/PnP Configurations from the Award BIOS main menu with the Left/Right arrow keys. The following items will be displayed: Onboard LAN This setting allows you to enable or disable the Onboard LAN Controller. The options are Enabled, and Disabled. Initial Display First This feature sets the device that will initiate the monitor display when the system is first turned on. The options are PCI Slot and Onboard.
Chapter 4: BIOS 4-4.5 Hardware Monitors This section allows the BIOS to display the status of hardware components monitored by the AwardBIOS. CPU Warning Temperature This allows you to set the CPU warning temperature threshold. If the CPU temperature reaches this threshold, an alarm will be activated and a warning message will be displayed on the screen. The options are Disabled, 600C/1400F, 650C/1490F, 700C/1580F, 750C/1670F, 800C/1760F and 850C/1850F. (See the note below.
PDSLA/PDSLE User's Manual CPU Clock Ration Use this option to set the clock ratio of the processor. The minimum setting is 12 and the maximum is 13. Key in the desired number in the text box provided. Auto Detect PCI CLK Select Enabled to allow the system automatically detect the setting of the PCI clock. The options are Enabled and Disabled. Spread Spectrum Spread Spectrum is a technique used to stabilize a system by reducing the level of ElectroMagnetic Interference.
Chapter 4: BIOS Set Supervisor Password When the item Set Supervisor Password is highlighted on the above screen, press the key. When prompted, type the Supervisor Password in the dialogue box to set or to change the Supervisor Password. Set User Password When the item Set User Password is highlighted on the above screen, press the key. When prompted, type the User Password in the dialogue box to set or to change the User Password.
PDSLA/PDSLE User's Manual The Award BIOS attempts to load the operating system from devices specified by the users in a user-specified sequence. Hard Disk Boot Priority This item allows the user to select the Boot Priority of Hard Disk Devices. First Boot Device This item allows the user to set the first boot-up device. The options are Floppy, LS120, HDD, CDROM, ZIP100, USB-FDD, USB-ZIP, USB-CDROM, USB-HDD, LAN and Disabled. Second Boot Device This item allows the user to set the second boot-up device.
Chapter 4: BIOS 4-7 Exit Choose Exit from the Award BIOS main menu with the Left/Right arrow keys. You should see the following display: Save & Exit Setup When the item Save & Exit Setup is highlighted, press to save the changes you've made in the BIOS program (CMOS) and exit. Your system should, then, continue with the boot-up procedure. Exit without Saving When the item Exit without Saving is highlighted, press to exit the Setup routine without saving any changes you may have made.
PDSLA/PDSLE User's Manual Notes 4-16
Appendix A: BIOS POST Messages Appendix A BIOS POST Messages During the Power-On Self-Test (POST), the BIOS will check for problems. If a problem is found, the BIOS will activate an alarm or display a message. The following is a list of such BIOS messages.
PDSLA/PDSLE User's Manual Notes A-2
Appendix B: Award BIOS POST Codes Appendix B Award BIOS POST Codes This section lists the POST (Power On Self Testing) Codes for the Award BIOS. POST (hex) Description CFh Test CMOS R/W functionality. C0h Early chipset initialization: - Disable shadow RAM - Disable L2 cache (socket 7 or below) - Program basic chipset registers C1h Detect memory - Auto detection of DRAM size, type and ECC. - Auto detection of L2 cache (socket 7 or below) C3h Expand compressed BIOS code to DRAM.
PDSLA/PDSLE User's Manual POST (hex) Description 11h Reserved 12h Use walking 1's algorithm to check out interface in CMOS circuitry. Also set real-time clock power status, and then check for override. 13h Reserved 14h Program cipset defaults into chipset. Chipset default values are MODBINable by OEM customers. 15h Reserved 16h Initial Early_Init_Onboard_Generator switch. 17h Reserved 18h Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or 686).
Appendix B: Award BIOS POST Codes POST (hex) Description 2Ah Reserved 2Bh Reserved 2Ch Reserved 2Dh 1. Initialize multi-language. 2. Put information on screen display, including Award title, CPU type, CPU speed, etc. 2Eh Reserved 2Fh Reserved 30h Reserved 31h Reserved 32h Reserved 33h Reset keyboard except Winbond 977 series Super I/O chips.
PDSLA/PDSLE User's Manual POST (hex) Description 4Ch Reserved 4Dh Reserved 4Eh 1. Program MTRR of M1 CPU. 2. Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range. 3. Initialize the APIC for P6 class CPU. 4. On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical. 4Fh Reserved 50h Initialize USB. 51h Reserved 52h Test all memory (clear all extended memory to 0).
Appendix B: Award BIOS POST Codes POST (hex) Description 71h Reserved 72h Reserved 73h (Optional feature) Enter AWDFLASH.EXE if: - AWDFLASH is found in floppy drive. - ALT+F2 is pressed 74h Reserved 75h Detect and install all IDE devices: HDD, LS120, ZIP, CD-ROM, etc. 76h Reserved 77h Detect serial ports and parallel ports. 78h Reserved 79h Reserved 7Ah Detect and install co-processor. 7Bh Reserved 7Ch Reserved 7Dh Reserved 7Eh Reserved 7Fh 1.
PDSLA/PDSLE User's Manual POST (hex) Description 93h Read HDD boot sector information for Trend Anti-Virus. 94h 1. Enable L2 cache. 2. Program boot up speed. 3. Chipset final initialization. 4. Power management final initialization. 5. Clear screen and display memory table. 6. Program K6 write allocation. 7. Program P6 class write combining. 95h 1. Program daylight saving 2. Update keyboard LED and typematic rate. 96h 1. Build MP table. 2. Build and update ESCD. 3. Set CMOS century to 20h or 19h. 4.
