User`s manual

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X8DAH+/X8DAH+-F User's Manual
1-2 Chipset Overview
Built upon the functionality and the capability of the 5500/5600 Series Processor
platform, the X8DAH+/X8DAH+-F motherboard provides the performance and
feature set required for dual-processor/IOH-based high-end systems optimized for
High Performance Computing (HPC)/Cluster platforms. The 5520 chipset consists
of the IOH 36D (I/O Hub), and the ICH10R (South Bridge). With the Intel QuickPath
Interconnect (QPI) controller built in, the 5520 platform offers the next generation
point-to-point system interconnect interface that replaces the current Front Side
Bus Technology, substantially enhancing system performance and scalability.
The IOH-36D connects to each processor through an independent QPI link. Each
link consists of 20 pairs of unidirectional differential lanes for transmission and
receiving in addition to a differential forwarded clock. A full-width QPI link pair
provides 84 signals.
The 5520 chipset supports up to 36 PCI Express Gen2 lanes, peer-to-peer read
and write transactions. The ICH10R provides up to seven PCI-Express ports, six
SATA ports and 10 USB connections.
In addition, the 5520 platform also offers a wide range of RAS (Reliability, Avail-
ability and Serviceability) features. These features include memory interface ECC,
x4/x8 Single Device Data Correction (SDDC), Cyclic Redundancy Check (CRC),
parity protection, out-of-band register access via SMBus, memory mirroring,
memory sparing, and Hot-plug support on the PCI-Express Interface.
Features of the 5500/5600 Processor and the 5520 Chipset
Four processor cores in each processor with 8MB shared cache among cores•
Two full-width Intel QPI links, up to 6.4 GT/s of data transfer rate in each direc-•
tion
Virtualization Technology, Integrated Management Engine supported
•
Point-to-point cache coherent interconnect, Fast/narrow unidirectional links, and •
Concurrent bi-directional traffi c
Error detection via CRC and Error correction via Link level retry
•