Datasheet
2-20
X6DHT-G User's Manual
Marvell SATA SMB Power
(I
2
C) Connector
Marvell SATA I
2
C Connector
(JS10), located between IDE1 Slot
and Chassis Intrusion Header,
monitors the status of PWR Sup-
ply, Fan and system temperature
for Marvell Serial ATA ports. See
the table on the right for pin defini-
tions.
M-SATA_ACT_Output Pin Definitions
(JS9)
Pin # Definition
1 SATA0_Act
2 SATA1_Act
3 SATA2_Act
4 SATA3_Act
5 LED_COM
Pin# Definition
6 SATA4_Act
7 SATA5_Act
8 SATA6_Act
9 SATA7_Act
10 NC
Marvell SATA Activity
Output LED Header
Marvell Serial ATA Activity Output
LED Header (JS9), located be-
tween Fan4 Header and Chassis
Intrusion Header, displays the sta-
tus of Marvell's SATA Activities.
See the table on the right for pin
definitions.
LAN1
®
J
L
A
N
1
S
UPER X6DHT-G
LAN2
DIMM 2A
D
IM
M
2
B
DIM
M
3A
D
IM
M
3
B
D
IM
M
4
A
D
IM
M
4
B
D
IM
M
1
B
DIMM 1A
12V 8-pin
PWR
SMBus
PWR
J
F
1
FP Control
OH
LED
IPMI
ID
E
2
F
lo
p
p
y
COM2
BIOS
Fan4
SATA0
SMB
P
C
I-X
10
0 M
H
z
P
C
I-X
1
0
0
M
H
z/Z
C
R
P
C
I-X
3
1
3
3
M
H
z
Battery
JP
L1
RAGE-
XL
P
C
I-E
X
8
Lindenhurst
North
Bridge
VGA
COM1
USB
0/1
KB/
Mouse
Fan6
Fan5
ATX PWR
12V 4-Pin
PW
R
Parrallel
Port
24-Pin
Fan7
JPW1
Fan8
CPU1
JWOR
S I/O
PSF
F
a
n
3
ID
E
1
P
C
I-3
2
USB2/3
ICH
JD1
JPG1
JWD
Slot1
Slot2
Slot3
Slot4
Slot5
Slot6
P
C
I-E
X
8
GLAN
CTLR
6300ESB
B
u
zzer
PXH
JBT1
SATA1
SATA0
SATA1
SATA2
SATA3
SATA4
SATA5
SATA6
SATA7
Marvell
Intel
GLAN
CTLR
JP
L2
M-SATA
Act LED
JL1
M-SATA
I
2
C
JPS1
SATA
Controller
F
a
n
2
Fan1
J
A
R
J
3
P
CPU2
E7520
B
a
n
k
1
B
a
n
k
2
B
a
n
k
3
B
a
n
k
4
WOL
DS9
DS1
DS10
DS2
DS11
DS3
DS12
DS4
DS13
DS5
DS14
DS6
DS15
DS7
DS16
DS8
LED
IDE2
Floppy
Fan4
JWOR
IDE1
T
A4
T
A5
SATA6
SATA7
M-SATA
Act LED
JL1
M-SATA
I
2
C
D
S13
D
S5
D
S14
S6
DS15
DS7
DS16
DS8
M-SATA I
2
C
M-SATA ACT
OUTPUT
Pin
Number
1
2
3
Definition
TWSI_SDA
Ground
TWSI_SCK
Marvell SATA I
2
C Pin
Definitions (JS10)