User`s manual

Chapter 1: Introduction
1-9
UDIMM/1600 1B
UDIMM/1600 1A
SOCKET
AM3R2
CPU
H
T
3
L
i
n
k
16
/ 16
- 2.6
G
H
z
UDIMM/1600 2B
UDIMM/1600 2A
PCI-E GEN2 X8
Slot7 PCI-E 2.0 x8 (in x16)
SATA x6
Slot5 PCI-E 2.0 x8
PCI-E GEN2 x1
INTEL
82574L
RJ45
A-Link
SP5100
BMC
VGA
WPCM450-R
PCI
LPC
SMBus
SIO
W83527HG
HWM
W83795G
SPI Flash
KB/MS
RMII
DDR2 SDRAM
64MB X16
PSU I2C
IPMB
VGA
FE PHY
RTL8201N
RJ45
Clock Gen
TPM
SR5650
COM2
COM1
RJ45
INTEL
82574L
Slot6 PCI-E 2.0 x4 (in x8)
SWITCH
PCI-E GEN2 x1
7xUSB
LSI 2308
SAS x8
PCI-E GEN2 X8
PCI-E GEN2 X4
Note: This is a general block diagram and may not exactly represent the features
on your motherboard. See the previous pages for the actual specifi cations of your
motherboard.
Figure 1-3. H8SML-7/i(F) Motherboard Layout
(not drawn to scale)
1-4 Chipset Overview
The H8SML-7/i(F) serverboard is based on the one AMD SR5650 and one SP5100
chipsets. These chipset functions as a Media and Communications Processors
(MCP). Controllers for the system memory are integrated directly into AMD Opteron
processors.
AMD SR5650/SP5100 Chipsets
The SR5650 and SP5100 chips are each a single-chip, high-performance
HyperTransport peripheral controller. It includes a 22-lane PCI Express interface,
an AMD Opteron 16-bit Hyper Transport interface link, a six-port Serial ATA interface
and a seven-port USB 2.0 interface. This hub connects directly to the CPU.