User Manual

240-Pin Unbuffered DIMM DDR3 SDRAM
http://www.supertalent.com/oem Products and Specifications discussed herein are subject to change without notice
9 © 2006 Super Talent Tech., Corporation.
11.4 AC Timing Parameters & Specifications (con’t)
DDR3-1066 DDR3-1333
Parameter Symbol
min max min max
Units Notes
Timing of WRA command to Power Down entry
(BL4MRS)
tWRAPDEN
WL +2
+WR +1
-
WL +2
+WR +1
- nCK 10
Timing of REF command to Power Down entry tREFPDEN 1
-
1
- 20,21
Timing of MRS command to Power Down entry tMRSPDEN tMOD(min)
-
tMOD(min)
-
ODT Timing
ODT high time without write command or with wirte
commandand BC4
ODTH4
4 - 4 - nCK
ODT high time with Write command and BL8 ODTH8
6 - 6 - nCK
Asynchronous RTT tum-on delay (Power-Down with DLL
frozen)
tAONPD 1 9 1 9
ns
Asynchronous RTT tum-off delay (Power-Down with DLL
frozen)
tAOFPD 1 9 1 9
ns
ODT turn-on tAON -300 300 -250 250
ps 7,f
RTT_NOM and RTT_WR turn-off time from ODTL off
reference
tAOF 0.3 0.7 0.3 0.7
tCK(avg)
8,f
RTT dynamic change skew tADC 0.3 0.7 0.3 0.7
tCK(avg)
f
Write Leveling Timing
First DQS pulse rising edge after tDQSS margining
mode is programmed
tWLMRD 40 - 40 - tCK
3
DQS/DQS delay after tDQS margining mode is
programmed
tWLDQSEN 25 - 25 - tCK
3
Setup time for tDQSS latch tWLS 245 - 195 -
ps
Hold time of tDQSS latch tWLH 245 - 195 -
ps
Write leveling output delay tWLO 0 9 0 9
ns
Write leveling output error tWLOE 0 2 0 2
ns