Datasheet

RAIDDrive II PCIe SSD Datasheet
Rev 1.0 July 2011 Page 20
10.0 PIN DESCRIPTIONS
10.1 RAIDDRIVE PCIE PIN ASSIGNMENTS
Pin
Side B
Side A
Name
Description
Name
Description
1
+12V
12V Power
PRSNT1#
Hot-Plug presence detect
2
+12V
12V Power
+12V
12V Power
3
RSVD
Reserved
+12V
12V Power
4
GND
Ground
GND
Ground
5
SMCLK
SMBus (System Management Bus)
Clock
JTAG2
TCK (Test Clock), clock input for
JTAG interface
6
SMDAT
SMBus (System Management Bus)
Data
JTAG3
TDI (Test Data Input)
7
GND
Ground
JTAG4
TDO (Test Data Output)
8
+3.3V
3.3V Power
JTAG5
TMS (Test Mode Select)
9
JTAG1
TRST# (Test Reset) resets the JTAG
interface
+3.3V
3.3V power
10
3.3Vaux
3.3V auxiliary power
+3.3V
3.3V power
11
WAKE#
Signal for Link reactivation
PERST#
Fundamental reset
Mechanical Key
12
RSVD
Reserved
GND
Ground
13
GND
Ground
REFCLK+
Reference clock
(differential pair)
14
PETp0
Transmitter differential pair,
Lane 0
REFCLK-
15
PETn0
GND
Ground
16
GND
Ground
PERp0
Receiver differential pair,
Lane 0
17
PRSNT2#
Hot-Plug presence detect
PERn0
18
GND
Ground
GND
Ground
End of the x1 connector
19
PETp1
Transmitter differential pair,
Lane 1
RSVD
Reserved
20
PETn1
GND
Ground
21
GND
Ground
PERp1
Receiver differential pair,
Lane 1
22
GND
Ground
PERn1
23
PETp2
Transmitter differential pair,
Lane 2
GND
Ground
24
PETn2
GND
Ground
25
GND
Ground
PERp2
Receiver differential pair,