User's Manual

Table of Figures
Figure 1: Block Diagram ........................................................................................................9
Figure 2: CPLD state machine.............................................................................................13
Figure 3: FPGA connections to Bank1 of QDRII.................................................................14
Figure 4: Top View................................................................................................................22
Figure 5: Bottom view ..........................................................................................................23
Figure 6: JTAG Connector, top view....................................................................................25
Table of Tables
Table 1: DIP switch SW1 position for special reset feature ...............................................16
Table 2: DIP switch SW1 position for the selection of the configuration bitstream source
.......................................................................................................................................16
Table 3: DIP switch SW1 position for the selection of the Flash erase & program
operations. .....................................................................................................................16
Table 4: Total available power. ............................................................................................18
Table 5: Power budget on 1.2v .............................................................................................18
Table 6: Power budget on 2.5v .............................................................................................18
Table 7: Power budget on 1.8v. ............................................................................................19
Table 8: Power budget on QDRII 0.9v Termination voltage. .............................................19
Table 9: Power budget on QDRII and FPGA 0.9v reference voltage. ................................20
Table 10: Power budget on 3.3v. ..........................................................................................20
Table 11: Coolrunner II resources summary.......................................................................21
Table 12:Coolrunner II pin resources. .................................................................................21
Table 13: Pin allocation by Bank .........................................................................................24
User Manual SMT348 Page 5 of 29 Last Edited: 29/02/2008 17:52:00