User's Manual

4.2.13 Clocking scheme
The SMT348 module contains a 50MHz LVTTL clock, a 200MHz clock, and a connector for
an external LVTTL clock input/output.
50 MHz LVTTL oscillator: Main system clock. Clocks the CPLD and the FPGA. Can be input
in a DCM.
200MHz LVTTL oscillator: QDRII clock. Can also be used as a main FPGA clock. Can be
input in a DCM.
An external clock input is provided to the Virtex 4 FPGA via an MMCX connector. This
connector is NOT fitted by default or if a mezzanine is required. YOU MUST ask Sundance if
needed for your application.
4.2.14 LEDs
4 Red LEDs connect to the FPGA and are available to the User: D4, D5, D6, D7.
1 Green Led: D1, connects to the DONE pin of the FPGA and is lit to show that the FPGA is
configured. (depending on supply from manufacturer a red led can be fitted instead).
4.2.15 Performance
The FPGA features like speed grade and density dictate most performances.
The performances achievable by the other components are given in the chapters above and
the components respective data sheets.
4.3 Interface Description
For the TIM to carrier board or external world interfacing, see in
Sundance Help file (that you
can download from the Sundance Wizzard)
4.3.1 Power Budget
The SMT348 draws its power from the 3.3v rail of the PCI.
The PCI specification stipulates that the maximum power for one card is 25W.
Therefore, the maximum current that the SMT348 could draw from +3.3V is 7.6A, assuming
zero current on all the other supply voltages.
But this limit is "system dependent," so a given system might not have the full 7.6A available
for a slot even if it is the only PCI card in the system.
A system might balance the power capabilities differently between the +5V and +3.3V (and +/-
12V) supplies, rather than making 25W available from +5V and 25W available from +3.3V.
User Manual SMT348 Page 17 of 29 Last Edited: 29/02/2008 17:52:00