User's Manual

SDC-SSD40NBT
User’s Manual, version 4.1
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12
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UART Timing Requirements
The following figure (Figure 3) displays UART timing.
Figure 2: UART Timing Requirements
Notes: The UART 4-wire interface supports Bluetooth 2.1 HCI Specification.
PCM data frames are sent MSB first.
Table 4: UART Timing Requirements
Reference
Description
Min.
Typ.
Max.
Unit
1
Delay time, BT_UART_CTS_N low to
UART_TXD valid
-
-
24
Baudout
cycles
2
Setup time, BT_UART_CTS_N high
before midpoint of stop bit
-
-
10
ns
3
Delay time, midpoint of stop bit to
BT_UART_RTS_N high
-
-
2
Baudout
cycles
PCM Interface Timing
 PCM Defaults
 Short Frame Sync, Master Mode
 Short Frame Sync, Slave Mode
 Long Frame Sync, Master Mode
 Long Frame Sync, Slave Mode
PCM Defaults
SCO Routing
PCM
Interface Rate
512
Clock Mode
Master
Sample Interval
8khz
Sync Mode
Master
16 bit mono
Frame Type
Short