Data Sheet

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3. Functional Description
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Figure 3-2. Power Management
• Off: CHIP_PU pin is low. The RTC is disabled. All registers are cleared.
• Deep-sleep: Only RTC is powered on – the rest of the chip is powered off. Recovery
memory of RTC can save basic Wi-Fi connection information.
• Sleep: Only the RTC is operating. The crystal oscillator is disabled. Any wake-up
events (MAC, host, RTC timer, external interrupts) will put the chip into the wakeup
mode.
• Wakeup: In this state, the system switches from the sleep states to the PWR mode.
The crystal oscillator and PLLs are enabled.
• On: The high speed clock is able to operate and sent to each block enabled by the
clock control register. Lower level clock gating is implemented at the block level,
including the CPU, which can be gated off using the WAITI instruction while the
system is on.
Work
Off
Deep Sleep
Sleep XTAL Off
Wakeup
CPU On
Tx Rx
WAKEUP Events
XTAL_SETTLE
CHIP_PU
CHIP_PU
Sleep Criteria
Sleep Criteria
Espressif
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2017.04